AdvancedTCATM

PICMG3.4?RevisionD1.0Specification

PCIExpressandAdvancedSwitchingforAdvancedTCATMSystems

May12,2003

DONOTSPECIFYORCLAIMCONFORMANCETOTHISDRAFTSPECIFICATION

PICMG3.4DraftRev.1.0

DONOTSPECIFYORCLAIMCONFORMANCETOTHISDRAFTSPECIFICATION

PAGE\*roman

iii

Copyright2003,PCIIndustrialComputerManufacturersGroup.

TheattentionofadoptersisdirectedtothepossibilitythatcompliancewithoradoptionofPICMGspecificationsmayrequireuseofaninventioncoveredbypatentrights.PICMGshallnotberesponsibleforidentifyingpatentsforwhichalicensemayberequiredbyanyPICMGspecificationorforconductinglegalinquiriesintothelegalvalidityorscopeofthosepatentsthatarebroughttoitsattention.PICMGspecificationsareprospectiveandadvisoryonly.Prospectiveusersareresponsibleforprotectingthemselvesagainstliabilityforinfringementofpatents.

NOTICE:

Theinformationcontainedinthisdocumentissubjecttochangewithoutnotice.ThematerialinthisdocumentdetailsaPICMGspecificationinaccordancewiththelicenseandnoticessetforthonthispage.Thisdocumentdoesnotrepresentacommitmenttoimplementanyportionofthisspecificationinanycompany'sproducts.

WHILETHEINFORMATIONINTHISPUBLICATIONISBELIEVEDTOBEACCURATE,PICMGMAKESNOWARRANTYOFANYKIND,EXPRESSORIMPLIED,WITHREGARDTOTHISMATERIALINCLUDING,BUTNOTLIMITEDTOANYWARRANTYOFTITLEOROWNERSHIP,IMPLIEDWARRANTYOFMERCHANTABILITYORWARRANTYOFFITNESSFORPARTICULARPURPOSEORUSE.

InnoeventshallPICMGbeliableforerrorscontainedhereinorforindirect,incidental,special,consequential,relianceorcoverdamages,includinglossofprofits,revenue,dataoruse,incurredbyanyuseroranythirdparty.

CompliancewiththisspecificationdoesnotabsolvemanufacturersofAdvancedTCATMequipmentfromtherequirementsofsafetyandregulatoryagencies(UL,CSA,FCC,IEC,etc.).

PICMG,CompactPCI,andthePICMGandCompactPCIlogosareregisteredtrademarks,andAdvancedTCAandATCAaretrademarks,ofthePCIIndustrialComputerManufacturersGroup.

Allotherbrandorproductnamesmaybetrademarksorregisteredtrademarksoftheirrespectiveholders.

TABLEOFCONTENTS

REVISIONHISTORY V

INTRODUCTIONANDOBJECTIVES 1

SCOPE 1

OBJECTIVES 1

REFERENCEDOCUMENTS 2

ReferenceSpecifications 2

EnvironmentandRegulatoryDocuments 2

CONTRIBUTORS 3

SPECIALWORDUSAGE 3

NAMEANDLOGOUSAGE 4

LogoUse 4

TrademarkPolicy 4

SIGNALNAMINGCONVENTIONS 5

INTELLECTUALPROPERTY 5

ACRONYMSANDDEFINITIONS 5

PICMG3.0COMPLIANCE 6

FABRICINTERFACE 7

OVERVIEW 7

PICMG3.0PORTMAPPING 7

PCIEXPRESSLANES 7

PINASSIGNMENTS 8

PCIEXPRESSLINKWIDTHNEGOTIATION 9

SIGNALINTEGRITY 9

PICMG3.0SignalIntegrityRequirements 9

SYSTEMMANAGEMENT 10

OVERVIEW 10

PICMG3.0SHELFMANAGEMENTREQUIREMENTS 10

PICMG3.4IMPLEMENTATIONREQUIREMENTS 11

IPMCONTROLLERREQUIREMENTS 11

ELECTRONICKEYINGREQUIREMENTS 12

LinkDesignator 12

LinkType 13

LinkTypeExtension 13

LinkGroupingID 13

EXAMPLEINTERFACEINFORMATION 14

E-KEYINGANDLINKWIDTHNEGOTIATION 14

SHELFMANAGER 15

BASEINTERFACEREQUIREMENTS 15

LISTOFFIGURES

Figure1:AdvancedTCAFabricInterfaceGenericPinMappings 7

Figure2:PICMG3.0SystemManagementModel 11

LISTOFTABLES

Table1:PICMG3.4ChannelOptions 8

Table2:PinMappingsforPICMG3.4ChannelInterfaceOptions 8

Table3:LinkDesignatorFields(12bitstotal) 12

Table4:LinkTypeValues(8bits) 13

Table5:LinkTypeExtension(4bits) 13

Table6:Example1PortFRUInformation 14

Table7:Example2x4PCIExpressImplementation 15

REVISIONHISTORY

Revision

Date

Description

Draft0.40

October11,2002

OriginalDraft

Draft0.60

December18,2002

Firstcompletedraftbasedonsubcommitteediscussions

Draft0.70

January29,2003

Updateddraftbasedonsubcommitteefeedback

Draft0.71

February3,2003

Updateddraftbasedon1/29subcommitteemeeting

Draft0.72

March12,2003

Updateddraftbasedon2/26subcommitteemeeting.

RemovedalldefinitionsandacronymsthatareeithernotusedinthedocumentorareincludedinPICMG3.0toensuretherearenoconflictingdefinitions.

Draft0.8

March19,2003

UpdatedfrontmattertocomplywiththePICMG3.0specification.

Updateddraftbasedon3/12subcommitteemeeting.

Draft0.9

April7,2003

Nochangesfrom0.8exceptnumberingofdocument.

Draft1.0

May12,2003

UpdatedbasedonFinalSubcommitteeBallotforPICMG

3.4D0.9feedback.

PICMG3.4DraftRev.1.0

DONOTSPECIFYORCLAIMCONFORMANCETOTHISDRAFTSPECIFICATION

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10

INTRODUCTIONANDOBJECTIVES

ThePICMG3.4specificationisamemberofthePICMG3.0AdvancedTCATMseriesofspecifications.ThePICMG3.0basespecificationdefinesaBoardandShelfarchitecturesharingacommonBackplane.PICMG3.4BoardsareintendedforusewithPICMG3.0backplanes,

sub-racksandshelves.Thespecificationissufficientlygenericthatitcanaccommodatemanydifferentpoint-to-pointdifferentialpairseriallinkstandards.PICMG3.4definestheuseofbothPCIExpressBaseandAdvancedSwitchingbasedonPCIExpresswithinanAdvancedTCAplatform.

ThePCIExpressBasespecificationwasratifiedbythePCISpecialInterestGroupinJuly2002.TheAdvancedSwitchingspecification,whichdefinesfunctionalextensionstothePCIExpressBasePHYandlinklayers,iscurrentlyunderdevelopment.BecausePCIExpressandAdvancedSwitchingareelectricallycompatible,PICMG3.4requirementsapplytobothtechnologies.TheAdvancedSwitchingSpecificationistargetedatenablingadditionalcommunicationscapabilities,includingagloballyflataddressablefabricusedtoenablestarandmeshtopologies,messagepassing,multicastandbroadcastcapabilities,aswellascongestionmanagementandtransportreliability.

Scope

ThescopeofthePICMG3.4subcommitteeeffortincludesdesignrulesandguidelinesfortheimplementationofPCIExpressand/orAdvancedSwitchingbasedNode,Mesh-EnabledandHubBoardsbasedonthePICMG3.0basespecification.

Objectives

Thecontentofthisdocumentisderivedfrom,andisdependentuponthePICMG3.0basespecification.Itisnotintendedasastandalonedocumentortobeusedseparatelyfromthebasespecification.

PICMG3.4buildsuponthePICMG3.0specificationtomeetthefollowingobjectives:

DefinethePCIExpresssignalstobeusedovertheFabricInterfacedefinedinthePICMG3.0basespecification.

Provideguidelinesfortheuseofx1,x2,andx4PCIExpresslinksthroughLinkWidthNegotiation.

SupportovereachPICMG3.0Channelforupto10GbpsPCIExpresslinks.

EstablishtheSystemManagementcriteriaforensuringcompatibilitybetweenPICMG

3.4boards.

DefinedesignrulessuchthatdevicescompatiblewithotherPICMG3.0standardscanbesafelyinsertedinthesamesystem,eveniftheydonotinteroperate.

ProvideexampletopologiesandexampleimplementationsforBoardandBackplanedevelopers.

ReferenceDocuments

Thefollowingsectionslistthepublicationsthatarerelevanttothisspecification.Manyofthespecificationsaresubjecttoperiodicandindependentupdatesandaretheresponsibilityoftheirrespectiveorganizations.Versionand/orrevisionnumbersofeachspecificationshouldbecarefullycheckedifusedinconjunctionwiththisspecification.

ReferenceSpecifications

Alldocumentsmaybeobtainedfromtheirrespectiveorganizations.

PCILocalBusSpecification,Revision2.2and2.31PCISpecialInterestGroup,5440SWWestgateDrive#217,Portland,OR97221,Tel:(503)291-2569,Fax:(503)297-1090

PCIExpressBaseSpecification,Revision1.0,PCISpecialInterestGroup,5440SWWestgateDrive#217,Portland,OR97221,Tel:(503)291-2569,Fax:(503)297-1090

PICMG?PoliciesandProceduresforSpecificationDevelopment,Revision1.5,October5,2001,PCIIndustrialComputerManufacturersGroup(PICMG?),401EdgewaterPlace,Suite500,Wakefield,MA01880USA,Tel:781.224.1100,Fax:781.224.1239,

PICMG?3.0Revision1.0,AdvancedTCATMBaseSpecification,PCIIndustrialComputerManufacturersGroup(PICMG?),401EdgewaterPlace,Suite500,Wakefield,MA01880USA,Tel:781.224.1100,Fax:781.224.1239,

ANSI/TIA/EIA-644-A-2001:ElectricalCharacteristicsofLowVoltageDifferentialSignaling(LVDS)InterfaceCircuits,January1,2001

EnvironmentandRegulatoryDocuments

AllenvironmentandregulatoryrequirementsthatpertaintothePICMG3.4specificationarecitedwithinthePICMG3.0basespecification.

1ReferencetoPCILocalBusSpecificationR2.3issolelytoprovideabaseforVPDkeyworddefinitionswithnointenttorequire2.3complianceinotherrespects.

Contributors

ThefollowingcompaniesparticipatedinthePICMG?3.4FinalSubcommitteeballot:

Advanet Pentair

Brooktrout PigeonPointSystems

Bustronic PLXTechnology,Inc

DiversifiedTechnology Rittal/Kaparel

DonHarrison Sanmina-SCI

GeneralMicroSystems SBSTechnologies

GNP SRC

Hybricon StarGen

IntelCorp. Tekelec

Interphase TranSwitch

SpecialWordUsage

Inthisspecificationthefollowingkeywords(inboldtext)willbeused:

may: indicatesflexibilityofchoicewithnoimpliedpreference.

should: indicatesflexibilityofchoicewithastronglypreferredimplementation.

shall: indicatesamandatoryrequirement.Designersshallimplementsuchmandatoryrequirementstoensureinterchangeabilityandtoclaimconformancewiththisspecification.

Note:Whennotinboldtext,thewords“may”,“should”,and“shall”arebeingusedinthetraditionalsense;thatis,theydonotadheretothestrictmeaningsdescribedabove.

NameAndLogoUsage

ThePCIIndustrialComputerManufacturersGroup'spolicyregardingtheuseofitslogosandtrademarksisasfollows:

LogoUse

PermissiontousethePICMG?organizationlogoisautomaticallygrantedtodesignatedmembersonly,asstipulatedonthemostrecentMembershipPrivilegesdocument(availableontheWebat),duringtheperiodoftimeforwhichtheirmembershipduesarepaid.Non-membersofPICMG?maynotusethePICMG?organizationlogo.

ThePICMG?organizationlogomustbeprintedinblackorincolorasshowninthefilesavailablefordownloadfromthemembers’sideoftheWebsite.Thecenterbarofthelogocontainingthephrase“PICMG”issethorizontally,andtheaspectratiooftheentirelogomustbemaintained,butthesizemaybevaried.NothingmaybeaddedtoordeletedfromthePICMG?logo.

Manufacturers’distributorsandsalesrepresentativesmatusetheAdvancedTCATMlogos(butnotthePICMG?organizationlogo)inpromotingproductssoldunderthenameofthemanufacturer.

TheuseoftheAdvancedTCATMlogosisaprivilegegrantedbythePICMG?organizationtocompanieswhohavepurchasedtherelevantAdvancedTCATMspecifications(oracquiredthemasamemberbenefit)andwhobelievetheirproductscomplywiththesespecifications.UseoftheAdvancedTCATMlogobyeithermembersornon-membersimpliessuchcompliance.MisuseoftheAdvancedTCATMlogosmayresultinPICMG?‘srevokingpermissiontousethem.

TheAdvancedTCATMlogosmustbeusedexactlyasshowninthefilesavailablefordownloadfromthePICMG?Website.Theaspectratiosofthelogosmustbemaintained,butthesizesmaybevaried.NothingmaybeaddedtoordeletedfromtheAdvancedTCATMlogos.

ColorinformationfortheredpartsoftheAdvancedTCATMlogosisasfollows:

Pantone032CVCistheclosestmatch.

CMYKcolorsareC:0,M:100,Y:100,K:0.

RGBcolorsareR:237,G:28,B:36.

TrademarkPolicy

ThePICMG?nameandlogoareregisteredtrademarksofPICMG?.Registeredtrademarksmustbefollowedbythesymbol,andthefollowingstatementmustappearinallpublishedliteratureandadvertisingmaterialinwhichthelogoappears:

PICMGandthePICMGlogoareregisteredtrademarksofthePCIIndustrialComputerManufacturingGroup.

TheAdvancedTCATMnameandlogosandtheATCATMnameandlogoaretrademarksofPICMG?inprocessofregistration.Thesetrademarksmustbefollowedbythesymbol,andthefollowingstatementmustappearinallpublishedliteratureandadvertisingmaterialinwhichthelogoappears:

AdvancedTCA,ATCA,andtheAdvancedTCAandATCAlogosaretrademarksofthePCIIndustrialComputerManufacturingGroup.

SignalNamingConventions

Allsignalsareactivehighunlessdenotedbyatrailing#symbol.Differentialsignalsaredenotedbyatrailing+(positive)or–(negative)symbol.

IntellectualProperty

ThePICMG3.4AdvancedTCASpecificationconformstotheIntellectualPropertyguidelinesoutlinedinthePICMGPoliciesandProceduresforSpecificationDevelopment.

AcronymsandDefinitions

AcronymsanddefinitionsusedthroughoutthisdocumentaredefinedinthePICMG3.0basespecification,Section1.8.Inordertomaintainconsistencytheyarenotrepeatedhere.ThefollowingtermisusedinthisdocumentbutisnotpartofthePICMG3.0definitions.

PCIExpressLane

Asetofdifferentialsignalpairs,onepairfortransmissionand

onepairforreception.Aby-NLinkiscomposedofNLanes.

PCIExpressLink

ThecollectionoftwoPCIExpressPortsandtheir

interconnectingLanes.APCIExpressLinkisadual-simplexcommunicationpath.

LinkWidth

Negotiation

TheprocesswheretwoPCIExpressPortsnegotiateacommon

numberofPCIExpressLanesthatwillbeusedtointerconnectthetwoPCIExpressPortsandformasinglePCIExpressLink.

PICMG3.0COMPLIANCE

ThePICMG3.4specificationiswhollyderivedfromthePICMG3.0specification,whichfullyaddressesallissueswithregardtomechanicalform,powerdistribution,andthermalcharacteristics.Thenotesprovidedinthissectionareprovidedforcontinuity;noexceptionstothebasespecificationhavebeentaken.

APICMG3.4deviceshallconformtoallthemechanical,power,andthermalspecificationssetforthinthePICMG3.0specification.

FABRICINTERFACE

Overview

ThissectiondefinesthemappingofPCIExpresssignalstotheFabricInterfaceofthePICMG

3.0specificationinordertoensurecompatibilitywithstandardPICMG3.0Backplanes.Inaddition,thespecificationwillenableinteroperabilitybetweenPICMG3.4compliantsystems.

PICMG3.0PortMapping

EachAdvancedTCAFabricInterfaceprovideseightdifferentialsignalpairsthatareusedforBoard-to-Boardcommunication.Upto16FabricInterfacesareprovided,whicharedistributedaccordingtotherequirementsdetailedinSection6ofthePICMG3.0specification.EachFabricInterfaceusestworowsofconnectionsinZone2.ThepinmappingsareshowninFigure1.

Figure1:AdvancedTCAFabricInterfaceGenericPinMappings

nn+1

A

Tx2+

Tx0+

B

Tx2-

Tx0-

C

Rx2+

Rx0+

D

Rx2-

Rx0-

E

Tx3+

Tx1+

F

Tx3-

Tx1-

G

Rx3+

Rx1+

H

Rx3-

Rx1-

Port2 Port3

Port0 Port1

PCIExpressLanes

PCIExpresssupportsmultipleLanesandcanbeconfiguredinavarietyofwidthsincludingx1,x2,x4,x8,x12,x16,andx32.ALaneisdefinedasasetofdifferentialsignalpairs(onepairfortransmitandoneforreceive),whichissynonymouswiththePortdefinitioninPICMG3.0.TheChanneltypessupportedinPICMG3.4consistofx1,x2,andx4configurationsthroughthePICMG3.0Backplane.OtherPortconfigurationsarenotsupportedbythePICMG3.4specification.Pinassignmentsareshowninthefollowingsection.TheseChanneloptionsareshowninTable1withtheirassociatedbitratesineachdirectionofthefullduplexPort.InthemultipleLanecases,theLanesareaggregatedtoformasinglelogicalChannel.

NOTE:“Lane”isaPCIExpressterm,“Port”isanAdvancedTCAterm.WithrespecttothePICMG3.4specification,thesetermsareequivalent.

Table1:PICMG3.4ChannelOptions

Option

Interface

Lanes/Ports

Maximumbitrate

1

PCIExpress

1

2.5Gb/s

2

PCIExpress

2

5.0Gb/s

3

PCIExpress

4

10.0Gb/s

PinAssignments

ThePICMG3.4specificationsupportstheDualStar,Dual-DualStar,andMeshtopologiesspecifiedinSection6ofthebasespecification,wheretheChannelmappingsforthesetopologiescanbereferenced.

PICMG3.4Boardsshallsupportsingle(x1),dual(x2),orquad(x4)PortChannelconfigurationsdefinedinthePCIExpressBaseSpecification.OtherPortconfigurationsarenotcompliantconfigurations.Table2showsthepinassignmentsforeachChannelconfigurationforoneFabricChannel.

WhenaPICMG3.4BoardpopulatesrowNofaBackplaneinterfaceconnectorandthatBoarddoesnotsupportthePorttowhichthepinsconnect,a100Ohm+/-10%resistiveterminationshallbepresentacrosstheRxsignalpairontheBoard.

Table2:PinMappingsforPICMG3.4ChannelInterfaceOptions

AdvancedTCA

Pins

1Port

Channel

2Port

Channel

4Port

Channel

Tx0+

Port0Tx+

Port0Tx+

Port0Tx+

Tx0-

Port0Tx-

Port0Tx-

Port0Tx-

Rx0+

Port0Rx+

Port0Rx+

Port0Rx+

Rx0-

Port0Rx-

Port0Rx-

Port0Rx-

Tx1+

NC

Port1Tx+

Port1Tx+

Tx1-

NC

Port1Tx-

Port1Tx-

Rx1+

Term

Port1Rx+

Port1Rx+

Rx1-

Term

Port1Rx-

Port1Rx-

Tx2+

NC

NC

Port2Tx+

Tx2-

NC

NC

Port2Tx-

Rx2+

Term

Term

Port2Rx+

Rx2-

Term

Term

Port2Rx-

Tx3+

NC

NC

Port3Tx+

Tx3-

NC

NC

Port3Tx-

Rx3+

Term

Term

Port3Rx+

Rx3-

Term

Term

Port3Rx-

PCIExpressLinkWidthNegotiation

PICMG3.4BoardsshallsupportLinkWidthNegotiation,asdefinedinthePCIExpressBaseSpecificationv1.0,todeterminethenumberofPortsconnectedinaFabricChannel.

SignalIntegrity

SignalintegrityrequirementsareimposedonallPICMG3.4Node,Mesh-EnabledandHubBoardsfromtwosources:PICMG3.0requirements;andPCIExpressrequirements.PICMG3.0definestheallowableworst-caselimitsonBackplanesignalintegrityandalsoimposesdesignconstraintsonBoards.ThePCIExpressspecificationalsodefinesanoveralllinkbudgetrequirementatthereceiver.TheNode,Mesh-EnabledandHubBoardsignalperformancerequirementsarederivedfromthesetwoconstraints.

PICMG3.0SignalIntegrityRequirements

PICMG3.0specifiesdesignrequirementsandguidelinesforbothBoardsandBackplanestoguaranteesignalintegrityandinteroperability.PICMG3.0BackplanesareguaranteednottoexceeddefinedsignalintegritylimitsandNodeBoardrequirementsarederivedfromthisBackplaneperformance.

PICMG3.4BoardsshouldcomplywithPICMG3.0Boardlayoutrequirements.PICMG

3.4BoardsthatdonotcomplywiththePICMG3.0requirementsshallvalidateperformanceusingsignalintegritysimulationsthatmeetthePCIExpressspecifications.

PICMG3.4Boardsshallcomplywiththedesignrequirementssetforthinsection8.3ofthePICMG3.0specification.

FabricInterfacedevicetransmittersandreceiversshallmeetthespecificationsasdefinedinsection4.3(ElectricalSub-lock)ofthePCIExpressspecification.

APICMG3.4receivershallbeACcoupledatoronthereceiverchip.TheACcouplingcapacitorsatthereceivershallbe100nF+/-1%.

BoardsthatdonotimplementallfourPortsinaChannelshallterminatetheRxpairsoftheunusedPorts.TheRxsignalsshallbeterminatedwitha100Ohm+/-10%resistiveterminationacrossthepairs(e.g.Rx3+,Rx3-)whentheconnectorforthepairsispresent.

ThePICMG3.4receiversshallwithstandaminimumof1600mVpeak-to-peakdifferentialvoltagewithoutanyadverseimpacttolong-termreliability,whetherornotthereceiverhardwareispowered.

SYSTEMMANAGEMENT

Overview

ThePICMG3.4systemmanageabilityrequirementsarederivedfromandbaseduponthefeaturesprovisionedinSection3,ShelfManagement,ofthePICMG3.0basespecification.SystemManagementisapplicabletoPCIExpressovertheFabricinterfaces.

TwosituationswheresystemsmanageabilityismostevidentinitsinteractionwiththePCIExpresssignalingareduringsystempower-upandinsertion/extractionofaBoard.

ThecontrolinterfacebetweenSystemManagementandthePCIExpressimplementationisbasedonIntelligentPlatformManagementInterface(IPMI)messaging.IPMImessagingisusedtofacilitatebothElectronic-Keying(E-Keying)andpowerstateprotocolprocesses.Ultimately,theactionstakenbytheNode,Mesh-Enabled,andHubBoards,inordertocomplywiththeE-keyingandpowermanagementmessagesareimplementationdependent.

PICMG3.0ShelfManagementRequirements

PICMG3.0definesadistributedmanagementmodelwiththreelevelsoffunctionality.TheintelligentdevicesineachlevelaredesignedtohaveaccesstoallBoardandShelfoperationsformonitoringsystemhealth.TheSystemManagementapplication(s)isdesignedtocollectthisinformation,reportanomalies,andtakecorrectiveactionwhenneeded.ThekeycomponentsshowninFigure2are:

TheIntelligentPlatformManagementController(IPMC)isthedevicethatimplementsmanagementfunctionsoneveryNode,Mesh-Enabled,andHubBoard.IthascontrolofthePayloadpowerinterface,FabricInterface,andmonitoringsensors.

TheShelfManagerisaShelf-levelentitythatmonitorsShelfcomponentsandalsocommunicatestoboththeSystemManagerandallIPMControllers.

TheSystemManagerisahigher-levelentity,whichmostlikelyisasoftwareapplicationresidingonaremoteworkstationorserver.ImplementationdetailsarebeyondthescopeofthePICMG3.0specifications.

AredundantIntelligentPlatformManagementBus(IPMB),whichisimplementedontheBackplaneforlow-speedcommunicationbetweentheShelfManagerandtheIPMControllers.

AnIP-basednetworkinterfaceisimplementedontheShelfManagerforcommunicationtotheSystemManagementapplications.

ThedualIPMBisreferredtoasIPMB-0andusesI2CasitsphysicallayerandtheIPMIasitsmessagingprotocol.IPMI(asextendedbyPICMG3.0)alsodefinesmethodsforHotSwapeventhandling,samplingsensordataandmaintainingdatarecordsforhardwareeventsandthereforemakesupasignificantpartoftheIPMCandShelfManagerimplementation.ThesefunctionsaretypicallyimplementedasfirmwareonembeddedprocessorswiththenecessaryI2Cornetworkinterfacehardware.

Figure2:PICMG3.0SystemManagementModel

PICMG3.4ImplementationRequirements

PICMG3.4boardsshallsupportE-KeyingbetweentheShelfManagerandtheIPMControllers.

PICMG3.4boardsshalladheretotherequirementsofthePICMG3.0basespecification,Section3.ThemostnoteworthyrequirementspertaintoE-Keying,powermanagementandtheexistenceofanIPMControllerontheNode,Mesh-Enabled,andHubBoards.

IPMControllerRequirements

IntelligentAdvancedTCAFieldReplaceableUnitsshallcontainanIPMControllerdeployedsuchthatthecombinedelectricalcharacteristicsofthedevice,signaltraceandconnectormeettherequirementsofPICMG3.0Section3.8,“IntelligentPlatformManagementBus”.TheIPMControllershallestablishtheuniqueaddressitwilluseinthemanagementnetworkinaccordancewithPICMG3.0section3.2.3,“Addressing”.AllPICMG3.4BoardsshallimplementIPMControllerminimumfunctionalrequirementsasdefinedinSection3ofthePICMG3.0specification.

TheIPMController(workingwiththeShelfManager)isresponsibleforimplementationofElectronicKeyingfunctionsasdefinedinPICMG3.0Section3.7.

ElectronicKeyingRequirements

TheElectronicKeyingmechanismdefinedinSection3.7ofthebasespecificationverifiesthefabriccompatibilitybetweenBoards,therebypreventingpossibledamageormis-operationbetweenBoardshavingtwodifferenttypesofLinks.AllPICMG3.4BoardsshallimplementElectronicKeyingasdefinedinSection3.7ofthePICMG3.0specification.

UpondetectionofanATCABoardduringthepower-onstateorBoardinsertion,theShelfManageraccessestheBoard’sFRUInformation,seekingBoardPoint-to-PointConnectivityRecord(s)thatdescribetheBoard’sconnectionstotheFabricInterface.OneormoreoftheserecordsshallbepresentonanyPICMG3.4Board.TheserecordscontainLinkDescriptorsdescribingpotentialLinksthatcanbeestablishedbetweenthatBoardandtheBackplaneintermsofLinkDescriptorfields:LinkDesignator,LinkType,LinkTypeExtension,andLinkGroupingID.ViatheBackplanePoint-to-PointConnectivityRecordintheShelfFRUInformation,theShelfManagercandeterminetheotherBoardsintheShelfthatconnecttoChannelsonthePICMG3.4BoardthatisbeingintegratedintotheShelf.TheShelfManagerdeterminesiftheyarecompatible.

TheShelfManager’sdeterminationofcompatiblePortsisbasedonabinarycomparisonofeachoftheLinkDescriptorfields(factoringanyapplicationdependentpoliciesthatmaybeimplementedintheShelfManager).Uponidentifyingamatch,anIPMImessagegoestobothIPMControllers,statingthattheLinkshouldbeenabledordisabled,augmentedwithadescriptionoftheChannelcapabilitiesrequired.Thisnotificationoccursviathe“SetPortState(Enable)”or“SetPortState(Disable)”commands.

ThefollowingsubsectionsprovidetherequirementsgoverningLinkDescriptorfieldsforPICMG3.4Boards.

LinkDesignator

ForallPICMG3.4Boards,LinkDescriptorsshallidentifytheLinkInterface(Base,Fabric,orUpdateChannel),theChannelNumber,andwhichPortsareenabled.

Table3showstheLinkDesignatorsfields.

Table3:LinkDesignatorFields(12bitstotal)

Description

Bits

ChannelNumber

6bits

Interface

00b=BaseInterface01b=FabricInterface

10b=UpdatePortInterface11b=Reserved

2bits

Port0-3Flags

4bits

LinkType

ForallPICMG3.4Boards,theLinkTypeshallbesetto05htodesignatePCIExpress.Table4showsthecompletesetofcurrentlydefinedLinkTypevalues,with05hdesignatedforPICMG

3.4systems.

Table4:LinkTypeValues(8bits)

Value

Definition

00h

Reserved

01h

PICMG3.0BaseInterface10/100/1000BASE-T

02h

PICMG3.1EthernetFabricInterface

03h

PICMG3.2InfiniBandFabricInterface

04h

PICMG3.3StarFabricFabricInterface

05h

PICMG3.4PCIExpressFabricInterface

06h…EFh

Reserved

F0h…FEh

OEM

FFh

Reserved

LinkTypeExtension

TheLinkTypeExtensionfieldaccountsforvariationswithinasubsidiaryspecificationsuchasPICMG3.4.Table5showstheLinkTypeExtensionvaluessupportedbyPICMG3.4forPCIExpress.

Table5:LinkTypeExtension(4bits)

Value

Definition

0000

PCIExpressBase

0001

AdvancedSwitching

0010-1000

ReservedbyPICMG3.4

1001–1110

OEM

1111

Reserved

PICMG3.4BoardsmaysupportbothPCIExpressBaseandAdvancedSwitchingbasedonPCIExpress.PersectionofthePICMG3.0specification,BoardscansupportmultipleprotocolsbyhavingmultipleSingle-ChannelLinkDescriptors.See