---Copyright2010-2012,Xilinx,--ThisfilecontainsandproprietaryinformationofXilinx,Inc.and--protectedunderU.S.andinternationalcopyrightandotherinlectualproperty---Di--Thisdierisnotalicenseanddoesnotgrantanyrightstothe--distributedherewith.Exceptasotherwiseprovidedinavalidlicenseissued--youbyXilinx,andtotheumextentpermittedbyapplicablelaw:(1)--MATERIALSAREMADEAVAILABLE"ASIS"ANDWITHALLFAULTS,ANDXILINX--DISALLWARRANTIESANDCONDITIONS,EXPRESS,IMPLIED,OR--INCLUDINGBUTNOTLIMITEDTOWARRANTIESOFMERCHANTABILITY,NON---ORFITNESSFORANYPARTICULARPURPOSE;and(2)Xilinxshallnotbe--(whetherincontractortort,includingnegligence,orunderanyother--ofliability)foranylossordamageofanykindornaturerelatedto,--underorinconnectionwiththesematerials,includingforanydirect,or--indirect,special,al,orconsequentiallossordamage(including--ofdata,profits,goodwill,oranytypeoflossordamagesufferedasa--ofanyactionbroughtbyathirdparty)evenifsuchdamageorloss--reasonablyforeseeableorXilinxhadbeenadvisedofthepossibilityofthe---CRITICAL--Xilinxproductsarenotdesignedorintendedtobefail-safe,orforusein--applicationrequiringfail-safeperformance,suchaslife-supportor--devicesorsystems,ClassIIImedicaldevices,nuclearfacilities,--relatedtothedeploymentofairbags,oranyotherapplicationsthatcould--todeath,alinjury,orseverepropertyorenvironmental--(individuallyandcollectively,"CriticalApplications").Customerassumes--soleriskandliabilityofanyuseofXilinxproductsinCritical--subjectonlytoapplicablelawsandregulationserninglimitationson-----THISCOPYRIGHTNOTICEANDDIERMUSTBERETAINEDASPARTOFTHISFILEATALL----KCPSM6-PicoBlazeforSpartan-6andVirtex-6---Startofdesignentry-14thMay- AlphaVersion-20thJuly- Version1.0-30thSeptember- Version1.1-9thFebruary- Correctiontoparitycomputation- Version1.2-4thOctober- AdditionofWebTalk---Ken--Xilinx--Benark--203Brooklands----SurreyKT13--United------Formatofthis---ThemoduledefinestheimplementationofthelogicusingXilinx--Theseensurepredictablesynthesisresultsandisethedensityofthe--TheUnisimLibraryisusedtodefineXilinxprimitives.Itisalsoused--simulation.Thesourcecanbeviewedat ----Library---StandardIEEE-libraryuseuselibrary ----MainEntityfor-entitykcpsm6 hwbuildstd_logic_vector(7downto0) interrupt_vector:std_logic_vector(11downto0):=X"3FF";scratch_pad_memory_size:integer:=64);port addressoutstd_logic_vector(11downto instruction:instd_logic_vector(17downto0);bram_enable:outstd_logic;in_port:instd_logic_vector(7downto0);out_port:outstd_logic_vector(7downto0);port_id:outstd_logic_vector(7downto0);write_strobe:outstd_logic;k_write_strobe:outstd_logic;read_strobe:outstd_logic;interrupt:instd_logic;interrupt_ack:outsleep:instd_logic;reset:inclk:inend----StartofMainArchitecturefor-architecturelow_level_definitionofkcpsm6----Signalsusedin--StateMachineand - t_state_valuestd_logic_vector(2downto t_state:std_logic_vector(2downto1); run_value:std_logic; run:std_logic;signalinternal_reset_value:std_logic;signalinternal_reset: sync_sleep:std_logic;signalint_enable_type:std_logic;signalinterrupt_enable_value:std_logic;signalinterrupt_enable:std_logic;signalsync_interrupt:std_logic;signalactive_interrupt_value:std_logic;signalactive_interrupt:-ArithmeticandLogical - arith_logical_sel:std_logic_vector(2downto0); arith_carry_in:std_logic; arith_carry_value:std_logic; arith_carry:signalhalf_arith_logical:std_logic_vector(7downto0);signallogical_carry_mask:std_logic_vector(7downto0);signalcarry_arith_logical:std_logic_vector(7downto0);signalarith_logical_value:std_logic_vector(7downto0);signalarith_logical_result:std_logic_vector(7downto-ShiftandRotate -signalshift_rotate_value:std_logic_vector(7downto0);signalshift_rotate_result:std_logic_vector(7downto0); shift_in_bit:std_logic;---ALU - alu_result:std_logic_vector(7downto0);signalalu_mux_sel_value:std_logic_vector(1downto0); alu_mux_sel:std_logic_vector(1downto--- - strobe_type:std_logic;signalwrite_strobe_value:std_logic;signalk_write_strobe_value:std_logic;signalread_strobe_value:--- -signalflag_enable_type:std_logic;signalflag_enable_value:std_logic; flag_enable: lower_parity:std_logic;signallower_parity_sel:std_logic;signalcarry_lower_parity:std_logic; upper_parity: parity:std_logic;signalshift_carry_value:std_logic; shift_carry:std_logic;signalcarry_flag_value:std_logic; carry_flag:signaluse_zero_flag_value:std_logic; use_zero_flag:std_logic;signaldrive_carry_in_zero:std_logic; carry_in_zero: lower_zero:signallower_zero_sel:std_logic;signalcarry_lower_zero:std_logic; middle_zero:std_logic;signalmiddle_zero_sel:std_logic;signalcarry_middle_zero:std_logic;signalupper_zero_sel:std_logic;signalzero_flag_value:std_logic; zero_flag:---ScratchPad 便簽- spm_enable_value:std_logic; spm_enable: spm_ram_data:std_logic_vector(7downto0); spm_data:std_logic_vector(7downto--- - regbank_type: bank_value: bank: loadstar_type:signalsx_addr4_value:std_logic;signalregister_enable_type:std_logic;signalregister_enable_value: register_enable: sx_addr:std_logic_vector(4downto sy_addr:std_logic_vector(4downto sx:std_logic_vector(7downto sy:std_logic_vector(7downto---Second - sy_or_kk:std_logic_vector(7downto---Program - pc_move_is_valid:std_logic; move_type: returni_type: pc_mode:std_logic_vector(2downto0); register_vector:std_logic_vector(11downto0); half_pc:std_logic_vector(11downto carry_pc:std_logic_vector(10downto pc_value:std_logic_vector(11downto pc:std_logic_vector(11downto pc_vector:std_logic_vector(11downto---ProgramCounter - push_stack: pop_stack: stack_memory:std_logic_vector(11downto0); return_vector:std_logic_vector(11downto0);signalstack_carry_flag:std_logic;signalshadow_carry_flag:std_logic;signalstack_zero_flag:std_logic;signalshadow_zero_value:std_logic;signalshadow_zero_flag:std_logic; stack_bank: shadow_bank: stack_bit: special_bit:signalhalf_pointer_value:std_logic_vector(4downto0);signalfeed_pointer_value:std_logic_vector(4downto0);signalstack_pointer_carry:std_logic_vector(4downto0);signalstack_pointer_value:std_logic_vector(4downto0); stack_pointer:std_logic_vector(4downto------Signalsbetweenthese***linesareonlymadevisibleduring---synthesistranslate-kcpsm6_opcodestring(1to19):="LOADs0,kcpsm6_statusstring(1to16):=sim_s0std_logic_vector(7downtosim_s1std_logic_vector(7downtosim_s2std_logic_vector(7downtosim_s3std_logic_vector(7downtosim_s4std_logic_vector(7downtosim_s5std_logic_vector(7downtosim_s6std_logic_vector(7downtosim_s7std_logic_vector(7downtosim_s8std_logic_vector(7downtosim_s9std_logic_vector(7downtosim_sAstd_logic_vector(7downtosim_sBstd_logic_vector(7downtosim_sCstd_logic_vector(7downtosim_sDstd_logic_vector(7downtosim_sEstd_logic_vector(7downtosim_sFstd_logic_vector(7downtosim_spm00sim_spm01sim_spm02sim_spm03sim_spm04sim_spm05sim_spm06sim_spm07sim_spm08sim_spm09sim_spm0Asim_spm0Bsim_spm0Csim_spm0Dsim_spm0Esim_spm0Fsim_spm10sim_spm11sim_spm12sim_spm13sim_spm14sim_spm15sim_spm16sim_spm17sim_spm18sim_spm19sim_spm1Asim_spm1Bsim_spm1Csim_spm1Dsim_spm1Esim_spm1Fsim_spm20sim_spm21sim_spm22sim_spm23sim_spm24sim_spm25sim_spm26sim_spm27sim_spm28sim_spm29sim_spm2Asim_spm2Bsim_spm2Csim_spm2Dsim_spm2Esim_spm2Fsim_spm30sim_spm31sim_spm32sim_spm33sim_spm34sim_spm35sim_spm36sim_spm37sim_spm38sim_spm39sim_spm3Asim_spm3Bsim_spm3Csim_spm3Dsim_spm3Esim_spm3Fsim_spm40sim_spm41sim_spm42sim_spm43sim_spm44sim_spm45sim_spm46sim_spm47sim_spm48sim_spm49sim_spm4Asim_spm4Bsim_spm4Csim_spm4Dsim_spm4Esim_spm4Fsim_spm50sim_spm51sim_spm52sim_spm53sim_spm54sim_spm55sim_spm56sim_spm57sim_spm58sim_spm59sim_spm5Asim_spm5Bsim_spm5Csim_spm5Dsim_spm5Esim_spm5Fsim_spm60sim_spm61sim_spm62sim_spm63sim_spm64sim_spm65sim_spm66sim_spm67sim_spm68sim_spm69sim_spm6Asim_spm6Bsim_spm6Csim_spm6Dsim_spm6Esim_spm6Fsim_spm70sim_spm71sim_spm72sim_spm73sim_spm74sim_spm75sim_spm76sim_spm77sim_spm78sim_spm79sim_spm7Asim_spm7Bsim_spm7Csim_spm7Dsim_spm7Esim_spm7Fsim_spm80sim_spm81sim_spm82sim_spm83sim_spm84sim_spm85sim_spm86sim_spm87sim_spm88sim_spm89sim_spm8Asim_spm8Bsim_spm8Csim_spm8Dsim_spm8Esim_spm8Fsim_spm90sim_spm91sim_spm92sim_spm93sim_spm94sim_spm95sim_spm96sim_spm97sim_spm98sim_spm99sim_spm9Asim_spm9Bsim_spm9Csim_spm9Dsim_spm9Esim_spm9Fsim_spmA0sim_spmA1sim_spmA2sim_spmA3sim_spmA4sim_spmA5sim_spmA6sim_spmA7sim_spmA8sim_spmA9sim_spmAAsim_spmABsim_spmACsim_spmADsim_spmAEsim_spmAFsim_spmB0sim_spmB1sim_spmB2sim_spmB3sim_spmB4sim_spmB5sim_spmB6sim_spmB7sim_spmB8sim_spmB9sim_spmBAsim_spmBBsim_spmBCsim_spmBDsim_spmBEsim_spmBFsim_spmC0sim_spmC1sim_spmC2sim_spmC3sim_spmC4sim_spmC5sim_spmC6sim_spmC7sim_spmC8sim_spmC9sim_spmCAsim_spmCBsim_spmCCsim_spmCDsim_spmCEsim_spmCFsim_spmD0sim_spmD1sim_spmD2sim_spmD3sim_spmD4sim_spmD5sim_spmD6sim_spmD7sim_spmD8sim_spmD9sim_spmDAsim_spmDBsim_spmDCsim_spmDDsim_spmDEsim_spmDFsim_spmE0sim_spmE1sim_spmE2sim_spmE3sim_spmE4sim_spmE5sim_spmE6sim_spmE7sim_spmE8sim_spmE9sim_spmEAsim_spmEBsim_spmECsim_spmEDsim_spmEEsim_spmEFsim_spmF0sim_spmF1sim_spmF2sim_spmF3sim_spmF4sim_spmF5sim_spmF6sim_spmF7sim_spmF8sim_spmF9sim_spmFAsim_spmFBsim_spmFCsim_spmFDsim_spmFEsim_spmFF---synthesistranslate------WebTalk-attributeCORE_GENERATION_INFO:attributeCORE_GENERATION_INFOoflow_level_definition:ARCHITECTUREIS---Attributestoguidemapoflogicinto-attributehblknm:attributehblknm reset_lut:labelisattributehblknmof run_flop:labelis"kcpsm6_control";attributehblknmofinternal_reset_flop:labelis"kcpsm6_control";attributehblknmof t_state_lut:labelis"kcpsm6_control";attributehblknmof t_state1_flop:labelis"kcpsm6_control";attributehblknmof t_state2_flop:labelis"kcpsm6_control";attributehblknmofactive_interrupt_lut:labelis"kcpsm6_control";attributehblknmofactive_interrupt_flop:labelis"kcpsm6_control";attributehblknmof sx_addr4_flop:labelis"kcpsm6_control";attributehblknmofarith_carry_xorcy:labelis"kcpsm6_control";attributehblknmofarith_carry_flop:labelisattributehblknmof zero_flag_flop:labelis"kcpsm6_flags";attributehblknmofcarry_flag_flop:labelis"kcpsm6_flags";attributehblknmof carry_flag_lut:labelis"kcpsm6_flags";attributehblknmof lower_zero_lut:labelis"kcpsm6_flags";attributehblknmofmiddle_zero_lut:labelis"kcpsm6_flags";attributehblknm upper_zero_lut:labelisinit_zero_muxcylower_zero_muxcy:middle_zero_muxcy:upper_zero_muxcy:int_enable_type_lutmove_type_lutpc_move_is_valid_lutinterrupt_enable_lutinterrupt_enable_flopalu_decode1_lutalu_mux_sel1_flopshift_carry_lutshift_carry_flopuse_zero_flag_lutuse_zero_flag_flopinterrupt_ack_flopshadow_zero_flag_flopalu_decode0_lutalu_mux_sel0_flopalu_decode2_lutlower_parity_lutparity_muxcyupper_parity_lutattributehblknmof parity_xorcy:labelis"kcpsm6_decode2";attributehblknmofsync_sleep_flop:labelis"kcpsm6_decode2";attributehblknmofsync_interrupt_flop:labelisattributehblknmof push_pop_lut:labelis"kcpsm6_stack1";attributehblknmofregbank_type_lut:labelis"kcpsm6_stack1";attributehblknm bank_lut:labelisattributehblknm bank_flop:labelisattributehblknmofregister_enable_type_lut:labelis"kcpsm6_strobes";attributehblknmofregister_enable_lut:labelis"kcpsm6_strobes";attributehblknmofflag_enable_flop:labelis"kcpsm6_strobes";attributehblknmofregister_enable_flop:labelis"kcpsm6_strobes";attributehblknmof spm_enable_lut:labelis"kcpsm6_strobes";attributehblknmofk_write_strobe_flop:labelis"kcpsm6_strobes";attributehblknmofspm_enable_flop:labelis"kcpsm6_strobes";attributehblknmofread_strobe_lut:labelis"kcpsm6_strobes";attributehblknmofwrite_strobe_flop:labelis"kcpsm6_strobes";attributehblknmofread_strobe_flop:labelisattributehblknmof stack_ram_low:labelis"kcpsm6_stack_ram0";attributehblknmofshadow_carry_flag_flop:labelis"kcpsm6_stack_ram0";attributehblknmofstack_zero_flop:labelis"kcpsm6_stack_ram0";attributehblknmofshadow_bank_flop:labelis"kcpsm6_stack_ram0";attributehblknmof stack_bit_flop:labelis"kcpsm6_stack_ram0";attributehblknm stack_ram_high:labelisattributehblknmof lower_reg_banks:labelis"kcpsm6_reg0";attributehblknmof upper_reg_banks:labelis"kcpsm6_reg1";attributehblknmof pc_mode1_lut:labelis"kcpsm6_vector1";attributehblknm pc_mode2_lut:labelis----Startofkcpsm6circuit---Summaryofallprimitives-- 29x 79LUTs(plus1LUTwillberequiredtoformaGND- 50x- 48x 82flip-- 20x (Dependingonthevalueof'hwbuild'- 0x (toeightFDRwillberecedby - 14x- 29x- 27x- 4x (16-- 2x 8x or8x- (8 (16 (32------Performcheckofgenerictoreporterrorassoonas--assert((scratch_pad_memory_size= or(scratch_pad_memory_size= or(scratch_pad_memory_size= 或（暫存器大小report"Invalid'scratch_pad_memory_size'.Pleasesetto64,128or 報(bào)告“無(wú)效的暫存器大小，請(qǐng)將其調(diào)64,128,severity ----StateMachineand --- 1x-4--9-reset_lut: 重置顯示查找表：LUT6genericmap(INIT=>X"FFFFF 通用映射（INIT對(duì)應(yīng)為X"FFFFF portmap(I0=>run, 端口映射（I0對(duì)應(yīng)為運(yùn)行，I1=> I2 I3=> I3tI4=> I5=> O5=> O6=> run_flop: 運(yùn)行觸發(fā)器portmap D 端口映射（DQ C=> internal_reset_flop: portmap D=> 端口映射（DQ=> C=> sync_sleep_flop: portmap D=> 端口映射（DQ C=> t_state_lut: tgenericmap(INIT=>X" 通用映射（INIT對(duì)應(yīng)為X" portmap(I0=>t_state(1), 端口映射（I0對(duì)應(yīng)為t狀態(tài)1，I1=> I2=> I3=> I4=> I5=> O5=> O6=> t_state1_flop: portmap( D=>t_state_value(1), 端口映射（D對(duì)應(yīng)于t狀態(tài)值1，Q=>t_state(1), Q對(duì)應(yīng)為t狀態(tài)1，C=> t_state2_flop: portmap( D=>t_state_value(2), 端口映射（D對(duì)應(yīng)于t狀態(tài)值2，Q=>t_state(2), Q對(duì)應(yīng)于t狀態(tài)2C=> int_enable_type_lut: 字符型顯示查找表：LUT6genericmap(INIT portmap(I0=> （I0I1=> （14I2=> （15I3=> I4=> （17I5=> I5O5=> O6=> interrupt_enable_lut genericmap(INIT portmap(I0=> I1=> I2=> I3=> I4=> I4I5=> O=> interrupt_enable_flop: portmap D=> 端口映射（DQ C=> sync_interrupt_flop: portmap D=> 端口映射 Q=> C=> Cactive_interrupt_lut 活躍中斷顯示查找表:LUT6genericmap(INIT=>X"CC33FF 通用映射(INIT對(duì)應(yīng)于X"CC33FF portmap(I0=>interrupt_enable, 端口映射(I0對(duì)應(yīng)于中斷，I1=> I2=> I3=> I4=> I5=> O5=> O5O6=> active_interrupt_flop: 活躍中斷觸發(fā)器portmap D=> Q C=> Cinterrupt_ack_flop: 中斷確認(rèn)字符觸發(fā)器portmap D=> 端口映射（DQ=> C=> C------- 2x- 10x- 2x- 6x-----DecodingforProgramCounterand-pc_move_is_valid_lut:genericmap(INIT=> portmap(I0=>I1=>I2=>I3=> I4=> （16I5=> O=> Omove_type_lut: 移動(dòng)型觸發(fā)器:LUT6genericmap(INIT X"7777027700000200"portmap(I0=>instruction(12), I1=>instruction(13), I1對(duì)應(yīng)于指令(13),I2=> （14I3=> I4=> I5=> I5O5=> O6=> pc_mode1_lut:1:LUT6genericmap(INIT=>portmap(I0=>instruction(12), I1=>returni_type, I1對(duì)應(yīng)于返回型，I2=> I3=> I4=> I5=> O5=> O6=> pc_mode2_lut:genericmap(INIT=> portmap(I0=>I0I1=>I2=>I3=>（16I4=>I5=>O=>push_pop_lut: 推彈出觸發(fā)器:LUT6genericmap(INIT portmap(I0=>instruction(12), I1=>instruction(13), I2對(duì)應(yīng)于指令(13),I2=> I3=> I4=> I5=> O5=> O6=> O6---Decodingfor-alu_decode0_lut: 算術(shù)邏輯單元0觸發(fā)器:LUT6genericmap(INIT portmap(I0=> I1=>instruction(14),I2=>instruction(15),I3=>instruction(16),I4=>'1',I5=>O5=>alu_mux_sel_value(0),O6=>alu_mux_sel0_flop: portmap D=> Q=>alu_mux_sel(0),C=>clk);alu_decode1_lut:genericmap(INIT portmap(I0=> I1=>instruction(13),I2=>instruction(14),I3=>instruction(15),I4=>instruction(16),I5=>'1',O5=>alu_mux_sel_value(1),O6=>arith_carry_in);alu_mux_sel1_flop:portmap D=> Q=>alu_mux_sel(1),C=>clk);alu_decode2_lut:genericmap(INIT portmap(I0=> I1=>instruction(15),I2=>instruction(16),I3=>'1',I4=>I5=>O5=>arith_logical_sel(1),O6=>-Decodingforstrobesand -register_enable_type_lut:genericmap(INIT portmap(I0=> I1=>I2=>instruction(15),I3=>instruction(16),I4=>instruction(17),I5=>'1',O5=>O6=>register_enable_lut:genericmap(INIT portmap(I0=> I1=>register_enable_type,I2=>instruction(12),I3=>instruction(17),I4=>t_state(1),I5=>O5=>O6=>flag_enable_flop:portmap D=> Q=>R=>active_interrupt,C=>clk);register_enable_flop:portmap D=> Q=>R=>active_interrupt,C=>clk);spm_enable_lut:genericmap(INIT portmap(I0=> I1=>instruction(14),I2=>instruction(17),I3=>strobe_type,I4=>t_state(1),I5=>'1',O5=>k_write_strobe_value,O6=>spm_enable_value);k_write_strobe_flop:portmap D=> Q=>R=>active_interrupt,C=>clk);spm_enable_flop:portmap D=> Q=>R=>active_interrupt,C=>clk);read_strobe_lut:genericmap(INIT portmap(I0=> I1=>instruction(14),I2=>instruction(17),I3=>strobe_type,I4=>t_state(1),I5=>'1',O5=>read_strobe_value,O6=>write_strobe_value);write_strobe_flop:portmap D=> Q=>R=>active_interrupt,C=>clk);read_strobe_flop:portmap D=> Q=>R=>active_interrupt,C=>clk);----Registerbank--- 2x- 1x- 1x--regbank_type_lut:genericmap(INIT portmap(I0=> I1=>instruction(13),I2=>instruction(14),I3=>instruction(15),I4=>instruction(16),I5=>instruction(17),O=>regbank_type);bank_lut:genericmap(INIT portmap(I0=> I1=>I2=>instruction(16),I3=>bank,I4=>regbank_type,I5=>t_state(1),O=>bank_flop:portmap D Q=>R=>internal_reset,C=>clk);sx_addr4_flop:portmap D=> Q=>sx_addr(4),C=>clk);sx_addr(3downto0)<=instruction(11downto8);sy_addr<=bank&instruction(7downto4);------- 3x- 5x-3x-2x-2x-5x--arith_carry_xorcy:portmap(LI=> CI=>carry_arith_logical(7),O=>arith_carry_value);arith_carry_flop:portmap D=> Q=>arith_carry,C=>clk);lower_parity_lut:genericmap(INIT portmap(I0=> I1=>I2=>arith_logical_result(0),I3=>arith_logical_result(1),I4=>'1',I5=>O5=>O6=>parity_muxcy:portmap(DI=> CI=>S=>O=>upper_parity_lut:genericmap(INIT portmap(I0=> I1=>arith_logical_result(3),I2=>arith_logical_result(4),I3=>arith_logical_result(5),I4=>arith_logical_result(6),I5=>arith_logical_result(7),O=>upper_parity);parity_xorcy:portmap(LI=> CI=>carry_lower_parity,O=>parity);shift_carry_lut:genericmap(INIT portmap(I0=> I1=>I2=>shadow_carry_flag,I3=>instruction(3),I4=>instruction(7),I5=>O=>shift_carry_flop:portmap D=> Q=>shift_carry,C=>clk);carry_flag_lut:genericmap(INIT portmap(I0=> I1=>arith_carry,I2=>parity,I3=>instruction(14),I4=>instruction(15),I5=>O5=>drive_carry_in_zero,O6=>carry_flag_value);carry_flag_flop:portmap D=> Q=>carry_flag,CE=>R=>internal_reset,C=>clk);init_zero_muxcy:portmap(DI=> CI=>S=>carry_flag_value,O=>carry_in_zero);use_zero_flag_lut:genericmap(INIT portmap(I0=> I1=>instruction(14),I2=>instruction(15),I3=>instruction(16),I4=>'1',I5=>O5=>O6=>use_zero_flag_flop:portmap D=> Q=>use_zero_flag,C=>clk);lower_zero_lut:genericmap(INIT portmap(I0=> I1=>alu_result(1),I2=>alu_result(2),I3=>alu_result(3),I4=>alu_result(4),I5=>'1',O5=>O6=>lower_zero_muxcy:portmap(DI=> CI=>carry_in_zero,S=>O=>middle_zero_lut:genericmap(INIT portmap(I0=> I1=>I2=>alu_result(5),I3=>alu_result(6),I4=>alu_result(7),I5=>'1',O5=>O6=>middle_zero_muxcy:portmap(DI=> CI=>carry_lower_zero,S=>middle_zero_sel,O=>upper_zero_lut:genericmap(INIT portmap(I0=> I1=>instruction(15),I2=>instruction(16),I3=>'1',I4=>I5=>O=>upper_zero_muxcy:portmap(DI=> CI=>carry_middle_zero,S=>upper_zero_sel,O=>zero_flag_value);zero_flag_flop:FDREportmap D=> Q=>zero_flag,CE=>flag_enable,R=>internal_reset,C=>clk);----12-bitProgramAddress-----Prepare12-bitvectorfromthesXandsYregister-register_vector<=sx(3downto0)&address_loop:foriin0to11generateattributehblknm:string;attributehblknm pc_flop:labelis"kcpsm6_pc"&attributehblknmofreturn_vector_flop:labelis"kcpsm6_stack_ram"&----Selectionofvectortoloadprogram---- 0Constantaaafrom- 1Returnvectorfrom---'aaa'isusedduring'JUMPaaa','JUMPc,aaa','CALLaaa'and'CALLc,--Returnvectorisusedduring'RETURN','RETURNc','RETURN&LOAD'and-- 6x- 12x-----Pipelineoutputofthestack-return_vector_flop:portmap D=> Q=>return_vector(i),C=>clk);---Multiplexinstructionconstantaddressandoutputfrom--2bitsperLUTsoonlygeneratewhen'i'is-output_data:if(irem2)=0 輸出數(shù)據(jù)：如果(iren2)=0attributehblknm hdlknmattributehblknmofpc_vector_mux_lut:labelis"kcpsm6_vector"&integer'image(i/8);屬性pc(vectir_mux觸發(fā)器hdlknm："kcpsm6_vector"& pc_vector_mux_lut:genericmap(INIT portmap(I0 I1=>return_vector(i),I2=>instruction(i+1),I3=>return_vector(i+1),I4=>instruction(12),I5=>O5=>O6=>endgenerate ----Program---Resetbyinternal_resethashighest--Enabledbyt_state(1)hassecond---Thefunctionperformedisdefinedby---001pc+1fornormalprogram- sinterruptvectorvalue(+0)duringactive-ThevectorisdefinedbyagenericwithdefaultvalueFF0-110register_vector(+0)for'JUMP(sX,sY)'and'CALL-010pc_vector(+0)for'JUMP/CALLaaa'and-011pc_vector+1for---Notethatpc_mode(0)isHighduringoperationsthatrequireanincrementto--TheLUT6associatedwiththeLSBmustinvertpcorpc_vectorinthesecases--pc_mode(0)alsohastobeconnectedtothestartofthecarry---3- 12x- 11x- 12x- 12x--pc_flop: portmap D=> Q=>R=>internal_reset,CE=>t_state(1),C=>lsb_pc:ifi=0 attributehblknm:attributehblknmofpc_xorcy:labelis"kcpsm6_pc"&integer'image(i/4);attributehblknmofpc_muxcy:labelis"kcpsm6_pc"&---LogicofLSBmustinvertselectedvaluewhenpc_mode(0)is--Theinterruptvectorisdefinedbya-low_int_vector:ifinterrupt_vector(i)='0'generateattributehblknm:string;attributehblknmofpc_lut:labelis"kcpsm6_pc"&integer'image(i/4);pc_lut:genericmap(INIT portmap(I0 I1=>pc_vector(i),I2=>pc(i),I3=>pc_mode(0),I4=>pc_mode(1),I5=>pc_mode(2),O=>half_pc(i));endgenerate high_int_vector:ifinterrupt_vector(i)='1' attributehblknm:attributehblknmofpc_lut:labelis"kcpsm6_pc"&integer'image(i/4);pc_lut:genericmap(INIT portmap(I0 I1=>I2=>I3=>pc_mode(0),I4=>pc_mode(1),I5=>pc_mode(2),O=>half_pc(i));endgenerate ---pc_mode(0)connectedtofirstMUXCYandcarryinputis-pc_xorcy:portmap(LI CI=>O=>pc_muxcy:portmap(DI CI=>S=>half_pc(i),O=>carry_pc(i));endgenerate upper_pc:ifi>0attributehblknm:attributehblknmofpc_xorcy:labelis"kcpsm6_pc"&integer'image(i/4);---Logicofuppersectionselectsrequired--Theinterruptvectorisdefinedbya-low_int_vector:ifinterrupt_vector(i)='0'generateattributehblknm:string;attributehblknmofpc_lut:labelis"kcpsm6_pc"&integer'image(i/4);pc_lut:genericmap(INIT portmap(I0 I1=>pc_vector(i),I2=>pc(i),I3=>pc_mode(0),I4=>pc_mode(1),I5=>pc_mode(2),O=>half_pc(i));endgenerate high_int_vector:ifinterrupt_vector(i)='1'generateattributehblknm:string;attributehblknmofpc_lut:labelis"kcpsm6_pc"&integer'image(i/4);pc_lut:genericmap(INIT portmap(I0 I1=>pc_vector(i),I2=>pc(i),I3=>pc_mode(0),I4=>pc_mode(1),I5=>pc_mode(2),O=>half_pc(i));endgenerate ---Carrychainimplementingremainderofincrement-pc_xorcy:portmap(LI CI=>carry_pc(i-1),O=>pc_value(i));---NoMUXCYrequiredatthetopofthe-mid_pc:ifi<11generateattributehblknm:string;attributehblknmofpc_muxcy:labelis"kcpsm6_pc"&integer'image(i/4);pc_muxcy:portmap(DI CI=>carry_pc(i-1),S=>half_pc(i),O=>endgenerate endgenerate --endgenerate ------Preservesupto31nestedvaluesoftheProgramCounterduringCALLand--Alsopreservesflagsandbankselectionduring-- 2x- 4x- 5x- 1x- 4x- 5x- 5x--shadow_carry_flag_flop:portmap D=> Q=>shadow_carry_flag,C=>clk);stack_zero_flop:portmap D=> Q=>shadow_zero_value,C=>clk);shadow_zero_flag_flop:portmap D=> Q=>shadow_zero_flag,C=>clk);shadow_bank_flop:portmap D Q=>shadow_bank,C=>clk);stack_bit_flop:portmap D Q=>special_bit,C=>clk);stack_ram_low:genericmap(INIT_A INIT_B=>X"0000000000000000",INIT_C=>X"0000000000000000",INIT_D=>portmap(DOA(0) DOA(1)=>stack_zero_flag,DOB(0)=>stack_bank,DOB(1)=>DOC=>stack_memory(1downto0),DOD=>stack_memory(3downto2),ADDRA=>stack_pointer(4downto0),ADDRB=>stack_pointer(4downto0),ADDRC=>stack_pointer(4downto0),ADDRD=>stack_pointer(4downtoDIA(0)=>carry_flag,DIA(1)=>zero_flag,DIB(0)=>bank,DIB(1)=>run,DIC=>pc(1downto0),DID=>pc(3downto2),WE=>t_state(1),WCLK=>clkstack_ram_high:genericmap(INIT_A INIT_B=>X"0000000000000000",INIT_C=>X"0000000000000000",INIT_D=>portmap(DOAstack_memory(5downto DOB=>stack_memory(7downto6),DOC=>stack_memory(9downto8),DOD=>stack_memory(11downtoADDRA=>stack_pointer(4downtoADDRB=>stack_pointer(4downto0),ADDRC=>stack_pointer(4downto0),ADDRD=>stack_pointer(4downtoDIA=>pc(5downto4),DIB=>pc(7downto6),DIC=>pc(9downto8),DID=>pc(11downto10),WE=>t_state(1),WCLK=>clkstack_loop:foriin0to4generatelsb_stack:ifi=0generateattributehblknm:attributehblknmofpointer_flop:labelis"kcpsm6_stack"&integer'image(i/4);attributehblknmofstack_pointer_lut:labelis"kcpsm6_stack"&integer'image(i/4);attributehblknmofstack_xorcy:labelis"kcpsm6_stack"&integer'image(i/4);attributehblknmofstack_muxcy:labelis"kcpsm6_stack"&integer'image(i/4);pointer_flop:portmap D Q=>R=>internal_reset,C=>clk);stack_pointer_lut:genericmap(INIT portmap(I0 I1=>pop_stack,I2=>push_stack,I3=>t_state(1),I4=>t_state(2),I5=>'1',O5=>feed_pointer_value(i),O6=>half_pointer_value(i));stack_xorcy:portmap(LI CI=>O=>stack_muxcy:portmap(DI CI=>S=>O=>endgenerate upper_stack:ifi>0generateattributehblknm:string;attributehblknmofpointer_flop:labelis"kcpsm6_stack"&integer'image(i/4);attributehblknmofstack_pointer_lut:labelis"kcpsm6_stack"&integer'image(i/4);attributehblknmofstack_xorcy:labelis"kcpsm6_stack"&integer'image(i/4);attributehblknmofstack_muxcy:labelis"kcpsm6_stack"&integer'image(i/4);pointer_flop:portmap D Q=>R=>internal_reset,C=>clk);stack_pointer_lut:genericmap(INIT portmap(I0 I1=>pop_stack,I2=>push_stack,I3=>t_state(1),I4=>t_state(2),I5=>'1',O5=>feed_pointer_value(i),O6=>half_pointer_value(i));stack_xorcy:portmap(LI CI=>stack_pointer_carry(i-1),O=>stack_pointer_value(i));stack_muxcy:portmap(DI CI=>stack_pointer_carry(i-1),S=>half_pointer_value(i),O=>stack_pointer_carry(i));endgenerateupper_stack;endgenerate----8-bitData--data_path_loop:foriin0to7attributehblknm:attributehblknmofarith_logical_lut:labelis"kcpsm6_add"&integer'image(i/4);attributehblknmofarith_logical_flop:labelis"kcpsm6_add"&integer'image(i/4);attributehblknmofalu_mux_lut:labelis"kcpsm6_alu"&----SelectionofsecondoperandtoALUand---- Register- Constant-- 4x