矩陣鍵盤的verilog代碼分享define

SCANmodule

key_scan(clk

,rst_n

,key_col,//鍵盤列輸入key_row,//鍵盤行輸出key_num,//指示哪一個按鍵按下，用0~15指示key_vld

//按下有效指示信號，其為1表示按下一次。);parameter

KEY_W

=

4;parameter

COL

=

0;parameter

ROW

=

1;parameter

DLY

=

2;parameter

FIN

=

3;parameter

COL_CNT

=

16;parameter

TIME_20MS=

1000000;//輸入信號定義input

clk

;input

rst_n

;input

[3:0]

key_col;//輸出信號定義output

key_vld;output[3:0]

key_num;output[KEY_W-1:0]

key_row;//輸出信號reg定義reg

[3:0]

key_num;reg

[KEY_W-1:0]

key_row;reg

key_vld;reg

[3:0]

key_col_ff0

;reg

[3:0]

key_col_ff1

;reg

[1:0]

key_col_get

;reg

shake_flag

;reg

shake_flag_ff0;reg

[3:0]

state_c

;reg

[19:0]

shake_cnt

;reg

[3:0]

state_n

;reg

[1:0]

row_index

;reg

[15:0]

row_cnt

;reg

[2:0]

x

;always

@(posedgeclkornegedgerst_n)beginif(rst_n==1'b0)beginkey_col_ff0<=4'b1111;key_col_ff1<=4'b1111;endelsebeginkey_col_ff0<=key_col

;key_col_ff1<=key_col_ff0;endendalways

@(posedgeclkornegedgerst_n)beginif(rst_n==1'b0)beginshake_cnt<=0;endelseif(add_shake_cnt)beginif(end_shake_cnt)shake_cnt<=0;elseshake_cnt<=shake_cnt+1;endelsebeginshake_cnt<=0;endendassign

add_shake_cnt=key_col_ff1!=4'hf&&shake_flag==0;assign

end_shake_cnt=add_shake_cnt&&shake_cnt==TIME_20MS-1;always

@(posedgeclkornegedgerst_n)beginif(rst_n==1'b0)beginshake_flag<=0;endelseif(end_shake_cnt)beginshake_flag<=1'b1;endelseif(key_col_ff1==4'hf)beginshake_flag<=1'b0;endend`ifdefSCANalways

@(posedgeclkornegedgerst_n)beginif(rst_n==1'b0)beginstate_c<=COL;endelsebeginstate_c<=state_n;endendalways

@(*)begincase(state_c)COL:beginif(col2row_start)beginstate_n=ROW;endelsebeginstate_n=state_c;endendROW:beginif(row2dly_start)beginstate_n=DLY;endelsebeginstate_n=state_c;endendDLY:

beginif(dly2fin_start)beginstate_n=FIN;endelsebeginstate_n=state_c;endendFIN:beginif(fin2col_start)beginstate_n=COL;endelsebeginstate_n=state_c;endenddefault:state_n=COL;endcaseendassign

col2row_start=state_c==COL&&end_shake_cnt;assign

row2dly_start=state_c==ROW&&end_row_index;assign

dly2fin_start=state_c==DLY&&end_row_index;assign

fin2col_start=state_c==FIN&&key_col_ff1==4'hf;always

@(posedgeclkornegedgerst_n)beginif(rst_n==1'b0)beginkey_row<=4'b0;endelseif(state_c==ROW)beginkey_row<=~(1'b1<<row_index);endelsebeginkey_row<=4'b0;endendalways

@(posedgeclkornegedgerst_n)beginif(rst_n==1'b0)beginrow_cnt<=0;endelseif(add_row_cnt)beginif(end_row_cnt)row_cnt<=0;elserow_cnt<=row_cnt+1;endendassignadd_row_cnt=state_c==ROW||state_c==DLY;assignend_row_cnt=add_row_cnt&&row_cnt==COL_CNT-1;always

@(posedgeclkornegedgerst_n)beginif(rst_n==1'b0)beginrow_index<=0;endelseif(add_row_index)beginif(end_row_index)row_index<=0;elserow_index<=row_index+1;endendassignadd_row_index=end_row_cnt;assignend_row_index=add_row_index&&row_index==x-1;always

@(*)beginif(state_c==ROW)x=4;elsex=1;endalways

@(posedgeclkornegedgerst_n)beginif(rst_n==1'b0)beginkey_col_get<=0;endelseif(col2row_start)beginif(key_col_ff1==4'b1110)key_col_get<=0;elseif(key_col_ff1==4'b1101)key_col_get<=1;elseif(key_col_ff1==4'b1011)key_col_get<=2;elsekey_col_get<=3;endendalways

@(posedgeclkornegedgerst_n)beginif(rst_n==1'b0)beginkey_num<=0;endelseif(state_c==ROW&&end_row_cnt)beginkey_num<={row_index,key_col_get};endelsebeginkey_num<=0;endendalways

@(posedgeclkornegedgerst_n)beginif(rst_n==1'b0)beginkey_vld<=1'b0;endelseif(state_c==ROW&&end_row_cnt&&key_col_ff1[key_col_get]==1'b0)beginkey_vld<=1'b1;en