1、ELECTRICALSignaling and Power DistributionAndrew M. VolkIntel Corporation,Agenda,Signaling USB Data Signaling Reset Signaling Resume Signaling Power Distribution Power Budgets Self-powered Devices Bus-Powered Devices,Objectives,Reliable, Low Cost Physical Layer between Host, Hubs and Functions Data

2、Communication Limited power distribution Dynamic attach-detach,Data Signaling,Bi-directional, half-duplex link Embedded clock and data Differential signal pair 12 Mbit / sec Full Speed (F.S.) bit rate 1.5 Mbit / sec Low Speed (L.S.) bit rate,Signaling States,J-state Idle State Differentiates full or

3、 low speed K-state (Inverse of J-state) Start of Packet identifier (SOP) Signaling auto resume from power suspend Single ended zero (SE0) state End of Packet identifier (EOP) Signaling reset Disconnected line,USB Transceiver,Differential Driver Slew rate controlled SE0 drive capability Differential

4、Receiver Sensitivity 3.0V Single-Ended Receivers Threshold: 0.6V - 1.5V,-,+,D+,D-,Rcv Data,Single-Ended Receivers,DifferentialReceiver,SE0Detect,Xmt Data,Force SE0,OE,DifferentialDriver,USB Connections and Terminations,D-,D+,R1,R1 = 15K?% R2 = 1.5K?%,F.S./L.S. USB Transceiver,(45Outputs),Host or Hub

5、 Port,ZO = 90?5% 5 Meters Max.,F.S. USB Transceiver,(45Outputs),Hub Port 0 or Full Speed Function,R1,R2,D-,D+,R1,R1 = 15K?% R2 = 1.5K?%,F.S./L.S. USB Transceiver,(45Outputs),Host or Hub Port,3 Meters Max.,F.S. USB Transceiver,(45Outputs),Low Speed Function,R1,R2,D+,D-,D+,D-,Connect / Disconnect,Disc

6、onnect Detection,Full Speed Device Connect Detection,D+,D-,Low Speed Device Connect Detection,VOH (min) VIH (max) VIL (min) VOL (max) VSS,Connect Detected,Device Connected,Device Connected,D-,D+,Connect Detected,VOH (min) VIH (max) VIL (min) VOL (max) VSS,Device Disconnected,Disconnect Detected,VOH

7、(min) VIH (max) VIL (min) VOL (max) VSS,Packet DelimitersSOP, EOP,V,OH,(min),V,SE0,(max),V,SE0,(min),V,OL,(max),V,SS,Bus Idle,First Bitof Packet,SOP,V,OH,(min),V,SE0,(max),V,SE0,(min),V,OL,(max),V,SS,Bus Driven to Idle State,Last Bitof Packet,Bus Idle,Bus Floats,EOP,Data Encoding,NRZI data format Da

8、ta toggled on a ? Zero bit stuffing after 6 ones Ensures a data transition,R,a,w,D,a,t,a,B,i,t,S,t,u,f,f,e,d,D,a,t,a,N,R,Z,I,E,n,c,o,d,i,n,g,I,d,l,e,I,d,l,e,I,d,l,e,Sync Pattern,Packet Data,Sync Pattern,Six Ones,Packet Data,Packet Data,Sync Pattern,Stuffed Bit,Full Speed,12 Mb/s Frequency Tolerance

9、?500ppm Shielded, twisted cable Z0 = 90 ?5% Driver characteristics 45 ?5% Rise/ Fall time: Min 4ns, Max 20ns,Bus Driver,30,Equiv. Output Impedance 15 ,D+,30,D-,(45,Imped),(45,Imped),OE,TxD+,TxD-,Identical,CMOS,Buffers,Example implementation of a full speed driver,Vcc = 3.3 V ?0.3,Full Speed Signalin

10、g,VSS,Receiver Signal Pins,V,OL,(max),V,OH,(min),One Way Cable Delay,VSS,* (See note),*(Slight impedance mismatch shown),One Bit,Time,(12Mb/s),Driver Signal Pins,V,OL,(max),V,OH,(min),Round,Trip,Cable,Delay,Signal pins pass output spec levels after round trip cable delay,Signal pins pass output spec

11、 levels after one way trip on cable,Low Speed,1.5 Mb/s Unshielded, untwisted cable Saves EMI suppression costs 1.5% Frequency tolerance Driver characteristics Rise/ Fall time: Min 75ns, Max 300ns Required on low speed functions and on the downstream ports of Hubs,Low Speed Signaling,VSS,One Bit,Time

12、,(1.5Mb/s),Driver,Signal Pins,V,OL,(max),V,OH,(min),Receiver waveforms are the same as on the driver, after including the cable delay,Reset Signaling,Signaled with a long Single-Ended Zero Reset not to be recognized until after 2.5 s Must be recognized by 5.5 s (if device active) Downstream Signalin

13、g only Sent by any downstream hub port Returns device to its default state,Suspend & Resume,Suspend All devices support suspend Enter suspend state after seeing idle bus for 3 ms Suspend current 500 A from bus Resume Devices resume on seeing non-J state USB devices can cause 搑emote wake-up? by signaling with a K-state,Resume Signaling,Function,Function,Hub Port,Other DS,Hub Ports,Hub,Root Port