1、cc1101 的詳解及單片機(jī)程序1. 初始化 SPI,MCU 各引腳。當(dāng)有數(shù)據(jù)接收或發(fā)送狀態(tài)聲明時(shí)，有中斷和查詢兩種方式。GDO0與 GDO引腳輸出至MCI引腳，若要用中斷 則要接至MCU外部中斷引腳，查詢時(shí)則可用GPIQ2. 復(fù)位 CC1101。3. 初始化CC1101。（寫(xiě)操作時(shí)可從 SO中讀出CC1101 狀態(tài)）初始化后 CC1100為IDLE狀態(tài).4. 狀態(tài)機(jī)轉(zhuǎn)換，寫(xiě)/讀FIFO數(shù)據(jù)。每次寫(xiě)操作時(shí)SO返回的值為寫(xiě)操作前的 CC11O0犬態(tài) 值，具體值見(jiàn)Table20 ;讀狀態(tài)命令為當(dāng)前 CC1100狀態(tài) 值，具體值見(jiàn)寄存器 0X35 說(shuō)明；注意兩者區(qū)別。快速認(rèn)識(shí) Cc1100Cc110

2、0 可以工作在同步模式下，代價(jià)是：MCI自己控制前導(dǎo)碼。本系統(tǒng)中，Cc1100將工作在異步模式下。知識(shí)點(diǎn)Head Byte ：在 引腳 Cc1100.Csn 有效后，通過(guò) SPI 總線寫(xiě)入 Cc1100 的第一個(gè)字節(jié)。Status Byte :在寫(xiě)入 HeadByte 的同時(shí)，MCU 得 到 Status Byte 。Burst Bit ：在 Head Byte 中的一個(gè) Bit, 有效值 ="1" ，無(wú)效值 ="0"GDO0:GDO0 可用作 FIFO 狀態(tài)輸出，載波感應(yīng) (CS), 時(shí)鐘輸 出,GDOO腳也能用作集成于

3、芯片的模擬溫度傳感器(未用).配置寄存器為IOCFGO( 0X02),現(xiàn)在配置為RX模式 下數(shù)據(jù)狀態(tài)反應(yīng)輸出 .GDO1:GD01與SPI的SO共用引腳，默認(rèn)狀態(tài)下為 3態(tài)，當(dāng) CSn為低電平時(shí)，此引腳 SPI的SO功能生效。配置寄存 器為IOCFGO(0X01),現(xiàn)在配置為空閑狀態(tài)下 3態(tài)，SPI 模式下 SO.GDO2:GDO2可用作FIFO狀態(tài)輸出，載波感應(yīng)(CS),時(shí)鐘輸 出，配置寄存器為IOCFG0 (0X00),現(xiàn)在配置為載波感應(yīng) (CS)輸出.TXOFF_MODE/RXOFF_MODE:注意，此配置為在數(shù)據(jù)包被發(fā)送 / 接收后狀態(tài)機(jī)狀態(tài) 決定位，僅是在發(fā)生發(fā)送或者接收后動(dòng)作；當(dāng)為

4、 IDLE 時(shí) 發(fā)SRX/STX后狀態(tài)機(jī)不按此配置運(yùn)行。TX/RX后要校準(zhǔn)。功率放大控制 (PATABLE):0X3E 為功率寫(xiě)入地址，0X22為為功率配置寄存器。 PATABLE是一個(gè)8字節(jié)表，定義了 8個(gè)PA功率值。這個(gè) 表從最低位( 0)到最高位( 7)可讀和寫(xiě)，一次一位。一 個(gè)索引計(jì)數(shù)器用來(lái)控制對(duì)這個(gè)表的訪問(wèn)。每讀出或?qū)懭氡碇械囊粋€(gè)字節(jié)，計(jì)數(shù)器就加 1 。當(dāng) CSn 為高時(shí)，計(jì)數(shù)值置為最小值。當(dāng)達(dá)到最大值時(shí)，計(jì) 數(shù)器由零重新開(kāi)始計(jì)數(shù)。FREND0.PA_POWE(R 2： 0)從 8 個(gè)功率值中選擇 1 個(gè)， 且振幅為相應(yīng)數(shù)等級(jí)。異步模式 :在此模式下，CC1101中的MCU勺若干支持

5、機(jī)制會(huì)停用， 包括數(shù)據(jù)包硬件處理， FIFO 緩沖 , 數(shù)據(jù)白化，交錯(cuò) (interleaver) 和前向糾錯(cuò) (FEC) ，曼徹斯特編碼 (Manchester encoding);MSK 不支持異步模式 ;PKTCTRLO.PKT_FORMAT = 3 使能異步模式， GDO(為“put , GDO0, GDO1或 GD02為 output 相應(yīng)配置位為 IOCFG0.GDO0_CFG, IOCFG1.GDO1_CFG IOCFG2.GDO2_CFG; 電磁波激活 (WOR):在W0濾波使用之前RC振蕩器必須啟用，RC振蕩器 是WOR定時(shí)器的時(shí)鐘源.在WO下，收到信號(hào)后會(huì)自動(dòng) 進(jìn)入RX模式

6、.載波感應(yīng)(CS)與RSSI:因此兩配置相互有連系 , 所以一起論述 .RSSI只能在RX模式下才能有效，作用為對(duì)當(dāng)前信號(hào) 質(zhì)量評(píng)估 , 信號(hào)質(zhì)量可從 RSSI 寄存器讀出 .RSSI 信號(hào)強(qiáng)度 可從0X34取出.RSSI(信號(hào)強(qiáng)度)計(jì)算公式：注:此為433M下,結(jié)果為 負(fù)數(shù) ,RSSI_dBm=(RSSI-256)/2-74 (RSSI>=128)RSSI_dBm= (RSSI/2)-74(RSSI.數(shù)據(jù) FIFO：當(dāng)TX操作時(shí)，由 MCU空制，溢出時(shí) CC1101出錯(cuò)；當(dāng)RX操作時(shí)，讀空時(shí) CC1101出錯(cuò)RX FIFO 和 TX FIFO 中的字節(jié)數(shù)也能分別從狀態(tài)寄存器 RXBYT

7、ES.NUM_RXBYTES txbytes.num_txbyteS讀出4 位 FIFOTHR.FIFO_THR 設(shè)置用來(lái)控制 FIFO 門(mén)限 點(diǎn)八、讀單字節(jié)時(shí)，CSn繼續(xù)保持低；。突發(fā)訪問(wèn)方式 允許一地址字節(jié)，然后是連續(xù)的數(shù)據(jù)字節(jié)，直到通過(guò)設(shè) 置 CSn 為高來(lái)斷訪問(wèn)當(dāng)寫(xiě)操作時(shí)，最后一個(gè)字節(jié)被傳送至 SI 腳后， 被SO腳接收的狀態(tài)位會(huì)表明在TX FIFO中只有一個(gè)字節(jié)是空閑，寄存器分類Configration Registers共 47 個(gè)，可讀，可寫(xiě)0x000x2EStatus Registers共 14 個(gè)，只讀0x300x3DCommand Strobe共 14 個(gè)，只寫(xiě)尋址空間：

8、0x300x3D14 個(gè)地址，對(duì)相應(yīng)的地址進(jìn)行寫(xiě)， 就相當(dāng)于激活了對(duì)應(yīng)的命令 本系統(tǒng)是用到的 Strobe ：CC1100_STROBE_RESETCC1100_STROBE_ENTER_RX_MODECC1100_STROBE_ENTER_TX_MODECC1100_COMMAND_STROBE_SIDLECC1100_COMMAND_STROBE_SFRXTX FIFO共 64 個(gè)，只寫(xiě)RX FIFO共 64 個(gè)，只讀Status(Command)Registers 操作 :當(dāng)?shù)刂窞?X300X3D時(shí)burst 為 1: 對(duì) Status Registers 的操作Status Regis

9、ters 只可讀，且只能一次讀一個(gè)字節(jié) , 不可寫(xiě)burst 為 0: 對(duì) Command Registers 操作 寄存器的訪問(wèn)和一個(gè)寄存器的操作一樣，但沒(méi)有數(shù)據(jù)被傳輸 . 寫(xiě)完畢后 ,CC1100 便執(zhí)行相應(yīng)操作 .讀寫(xiě)FIFO,有兩種模式：?jiǎn)巫止?jié)讀寫(xiě)； Burst讀寫(xiě)。 單字節(jié)讀寫(xiě)時(shí)序：1 Cc1100.Csn 有效。2 寫(xiě)入 Head Byte 。3 讀、寫(xiě)一個(gè) 1 字節(jié)4 Cc1100.Csn 無(wú)效。#include ;#include ;#define INT8U unsigned char#define INT16U unsigned int#define WRITE_BURST

10、0x40/連續(xù)寫(xiě)入#define READ_SINGLE0x80/讀#define READ_BURST0xC0/連續(xù)讀#define BYTES_IN_RXFIFO 0x7F / 接收緩沖區(qū) 的有效字節(jié)數(shù)#define CRC_OK 0x80 /CRC 校驗(yàn)通過(guò)位標(biāo)志 /*sbit GDOO =P1A3;sbit GDO2 =卩3八2;sbit MISO =P1A6;sbit MOSI =P1A5;sbit SCK =P1A7;sbit CSN =P1A2;*sbitLED2=P3A4;sbitLED1=P3A5;sbitKEY1=P3A6;sbitKEY2=P3A7;/*sbit led3

11、=P2A3;sbit led2=P2A2;sbit led1=P2A1;sbit led0=P2A0;/*/INT8U PaTabel8 =0x60 ,0x60 ,0x60 ,0x60 ,0x60 ,0x60 ,0x60 ,0x60;INT8U PaTabel8 =0xc0 ,0xc0 ,0xc0 ,0xc0 ,0xc0 ,0xc0 ,0xc0 ,0xc0;/ 修改發(fā)射功率/*void SpiInit(void);void CpuInit(void);void RESET_CC1100(void); void POWER_UP_RESET_CC1100(void);void halSpiWri

12、teReg(INT8U addr, INT8U value);void halSpiWriteBurstReg(INT8U addr, INT8U *buffer,INT8U count);void halSpiStrobe(INT8U strobe);INT8U halSpiReadReg(INT8U addr);void halSpiReadBurstReg(INT8U addr, INT8U *buffer,INT8U count);INT8U halSpiReadStatus(INT8U addr);void halRfWriteRfSettings(void);void halRfS

13、endPacket(INT8U *txBuffer, INT8U size);INT8U halRfReceivePacket(INT8U *rxBuffer, INT8U *length);/*/ CC1100 STROBE, CONTROL AND STATUS REGSITER#define CCxxx0_IOCFG20x00/GDO2outputpinconfiguration#define CCxxx0_IOCFG10x01/GDO1outputpinconfiguration#define CCxxx0_IOCFG00x02/GDO0outputpinconfigurationRX

14、FIFO and TX#define CCxxx0_FIFOTHR 0x03 /FIFO thresholds#define CCxxx0_SYNC1 0x04 / Sync word, highINT8U#define CCxxx0_SYNC0 0x05 / Sync word, lowINT8U#define CCxxx0_PKTLEN 0x06 / Packet length#define CCxxx0_PKTCTRL1 0x07 / Packet automation control#define CCxxx0_PKTCTRL0 0x08 / Packet automation con

15、trol#define CCxxx0_ADDR 0x09 / Device address#define CCxxx0_CHANNR0x0A/ Channel number#define CCxxx0_FSCTRL10x0B/ Frequencysynthesizer control#define CCxxx0_FSCTRL00x0C/ Frequencysynthesizer control#define CCxxx0_FREQ20x0D/ Frequencycontrol word, high INT8U#define CCxxx0_FREQ10x0E/ Frequencycontrol

16、word, middle INT8U#define CCxxx0_FREQ00x0F/ Frequencycontrol word, low INT8U#define CCxxx0_MDMCFG40x10/ Modemconfiguration#define CCxxx0_MDMCFG30x11/ Modemconfiguration#define CCxxx0_MDMCFG20x12/ Modemconfiguration#define CCxxx0_MDMCFG10x13/ Modemconfiguration#define CCxxx0_MDMCFG00x14/ Modemconfigu

17、ration#define CCxxx0_DEVIATN0x15/ Modemdeviation setting#define CCxxx0_MCSM2 0x16 / Main RadioControl State Machine configuration#define CCxxx0_MCSM1 0x17 / Main RadioControl State Machine configuration#define CCxxx0_MCSM0 0x18 / Main RadioControl State Machine configuration#define CCxxx0_FOCCFG 0x1

18、9 / FrequencyOffset Compensation configuration#define CCxxx0_BSCFG 0x1A / BitSynchronization configuration#define CCxxx0_AGCCTRL20x1B/ AGC control#define CCxxx0_AGCCTRL10x1C/ AGC control#define CCxxx0_AGCCTRL00x1D/ AGC control#define CCxxx0_WOREVT10x1E/ High INT8UEvent 0 timeout#define CCxxx0_WOREVT

19、00x1F/ Low INT8UEvent 0 timeout#define CCxxx0_WORCTRL0x20/ Wake On Radiocontrol#define CCxxx0_FREND10x21/ Front end RXconfiguration#define CCxxx0_FREND00x22/ Front end TXconfiguration#define CCxxx0_FSCAL30x23/ Frequencysynthesizer calibration#define CCxxx0_FSCAL20x24/ Frequencysynthesizer calibratio

20、n#define CCxxx0_FSCAL10x25/ Frequencysynthesizer calibration#define CCxxx0_FSCAL00x26/ Frequencysynthesizer calibration#define CCxxx0_RCCTRL1 0x27 /RC oscillatorconfiguration#define CCxxx0_RCCTRL0 0x28 /RC oscillatorconfiguration#define CCxxx0_FSTEST 0x29 / Frequency synthesizer calibration control#

21、define CCxxx0_PTEST 0x2A / Production test #define CCxxx0_AGCTEST 0x2B / AGC test#define CCxxx0_TEST20x2C/ Various testsettings#define CCxxx0_TEST10x2D/ Various testsettings#define CCxxx0_TEST00x2E/ Various testsettings/ Strobe commands#define CCxxx0_SRES0x30/ Reset chip.#define CCxxx0_SFSTXON 0x31

22、/ Enable and calibrate frequency synthesizer (if MCSM0.FS_AUTOCAL=1)./ If in RX/TX: Go to a wait state where only the synthesizer is/ running (for quick RX / TX turnaround).#define CCxxx0_SXOFF 0x32 / Turn off crystal oscillator.#define CCxxx0_SCAL 0x33 / Calibrate frequency synthesizer and turn it

23、off/ (enables quick start).#define CCxxx0_SRX 0x34 / Enable RX. Perform calibration first if coming from IDLE and/ MCSM0.FS_AUTOCAL=1.#define CCxxx0_STX 0x35 / In IDLE state:Enable TX. Perform calibration first if/ MCSM0.FS_AUTOCAL=I1f. in RXstate and CCAis enabled:/ Only go to TX if channel is clea

24、r.#define CCxxx0_SIDLE 0x36 / Exit RX / TX, turn off frequency synthesizer and exit/ Wake-On-Radio mode if applicable.#define CCxxx0_SAFC 0x37 / Perform AFC adjustment of the frequency synthesizer #define CCxxx0_SWOR 0x38 / Start automatic RX polling sequence (Wake-on-Radio)#define CCxxx0_SPWD 0x39

25、/ Enter power down mode when CSn goes high.#define CCxxx0_SFRX 0x3A / buffer.#define CCxxx0_SFTX 0x3B / buffer.Flush the RX FIFOFlush the TX FIFO#define CCxxx0_SWORRST 0x3C / Reset real time clock.#define CCxxx0_SNOP 0x3D /No operation. Maybe used to pad strobe commands to two/ INT8Us for simpler so

26、ftware.#define CCxxx0_PARTNUM 0x30#define CCxxx0_VERSION 0x31#define CCxxx0_FREQEST 0x32#define CCxxx0_LQI 0x33#define CCxxx0_RSSI 0x34#define CCxxx0_MARCSTATE 0x35#define CCxxx0_WORTIME1 0x36#define CCxxx0_WORTIME0 0x37#define CCxxx0_PKTSTATUS 0x38#define CCxxx0_VCO_VC_DAC 0x39#define CCxxx0_TXBYTE

27、S 0x3A#define CCxxx0_RXBYTES 0x3B#define CCxxx0_PATABLE 0x3Eallhigh#define CCxxx0_TXFIFO 0x3F#define CCxxx0_RXFIFO 0x3F/ RF_SETTINGSis a data structure which contains relevant CCxxx0 registerstypedef struct S_RF_SETTINGSINT8U FSCTRL2; / 自已加的INT8U FSCTRL1; / Frequency synthesizercontrol.INT8U FSCTRL0

28、; / Frequency synthesizercontrol.INT8U FREQ2; / Frequency control word,INT8U.INT8U FREQ1; / Frequency control word,middle INT8U.INT8U FREQ0; / Frequency control word, lowINT8U.INT8U MDMCFG4; / Modem configuration.INT8U MDMCFG3; / Modem configuration.INT8U MDMCFG2; / Modem configuration.INT8U MDMCFG1

29、; / Modem configuration.INT8U MDMCFG0; / Modem configuration.INT8U CHANNR; / Channel number.INT8U DEVIATN; / Modem deviation setting (when FSK modulation is enabled).INT8U FREND1; / Front end RXconfiguration.INT8U FREND0; / Front end RXconfiguration.INT8U MCSM0; / Main Radio Control StateMachine con

30、figuration.INT8U FOCCFG; / Frequency Offset Compensation Configuration.INT8U BSCFG; / Bit synchronization Configuration.INT8U AGCCTRL2; / AGC control.INT8U AGCCTRL1; / AGC control.INT8U AGCCTRL0; / AGC control.INT8U FSCAL3;/ Frequency synthesizercalibration.INT8U FSCAL2; / Frequency synthesizer cali

31、bration.INT8U FSCAL1; / Frequency synthesizer calibration.INT8U FSCAL0;/ Frequency synthesizercalibration.INT8U FSTEST; / Frequency synthesizer calibration controlINT8U TEST2; / Various test settings.INT8U TEST1; / Various test settings.INT8U TEST0; / Various test settings.INT8U IOCFG2; / GDO2 outpu

32、t pin configurationINT8U IOCFG0; / GDO0 output pin configurationINT8U PKTCTRL1; / Packet automation control.INT8U PKTCTRL0; / Packet automation control.INT8U ADDR; / Device address.INT8U PKTLEN; / Packet length. RF_SETTINGS;/const RF_SETTINGS rfSettings =0x00,0x08, / FSCTRL1 Frequency synthesizer co

33、ntrol.0x00, / FSCTRL0 Frequency synthesizercontrol.0x10, / FREQ2 Frequency control word, high byte.0xA7, / FREQ1 Frequency control word, middle byte.0x62, / FREQ0 Frequency control word, low byte.0x5B, / MDMCFG4 Modem configuration. /0xf6, / MDMCFG4 chang by allen0xF8, / MDMCFG3 Modem configuration.

34、/0x83, / MDMCFG3 chang by allen data rate =2.398K0x03, / MDMCFG2 Modem configuration.0x22, / MDMCFG1 Modem configuration.0xF8, / MDMCFG0 Modem configuration.0x00, / CHANNR Channel number.0x47, / DEVIATN Modem deviation setting(when FSK modulation is enabled).0xB6, /FREND1 Front end RXconfiguration.0

35、x10, /FREND0 Front end RXconfiguration.0x18, / MCSM0 Main Radio Control StateMachine configuration.0x1D, / FOCCFG Frequency OffsetCompensation Configuration.0x1C, / BSCFGBit synchronizationConfiguration.0xC7, / AGCCTRL2 AGC control.0x00, / AGCCTRL1 AGC control.0xB2, / AGCCTRL0 AGC control.0xEA, / FS

36、CAL3Frequency synthesizercalibration.0x2A, / FSCAL2Frequency synthesizercalibration.0x00, / FSCAL1Frequency synthesizercalibration.0x11, / FSCAL0Frequency synthesizercalibration.0x59, / FSTESTFrequency synthesizercalibration.0x81, / TEST2Various test settings.0x35, / TEST1Various test settings.0x09,

37、 / TEST0Various test settings.0x0B, / IOCFG2GDO2 output pinconfiguration.0x06, / IOCFG0D GDO0 output pin configuration. Refer to SmartRF?Studio User Manual for detailed pseudo register explanation.control.0x04, / PKTCTRL1 Packet automation /0x05, / PKTCTRL0 Packet automation control.0x01, /PKTCTRL0 crc disable chang by allen at 09.12.240x00, / ADDR Device address.0x0c / PKTLEN Packet length.;/*/ 函數(shù)名： delay(unsigned int s)/ 輸入：時(shí)間/ 輸出：無(wú)/ 功能描述：普通廷時(shí) , 內(nèi)部用 /* static void d