1、Design of Analog Integrated CircuitsStability and Frequency Compensation2022-5-192Outline 1. General Considerations 2. Multi-Pole Systems 3. Phase Margin 4. Frequency Compensation 5. Frequency Compensation of Two-Stage Op Amps2022-5-1931. General Considerations The circuit may oscillate in feedback

2、systems. Oscillation conditions (Barkhausens Criteria, 巴克豪森判據(jù))1)(1jsH2022-5-194 Gain Crossover Phase Crossover2022-5-195 Bode Plots (波特圖) LHP: left half-plane at complex frequency plane; RHP: right half-plane at complex frequency plane2022-5-196 波特（Bode）圖2022-5-197 Time-domain response of a closed-l

3、oop system versus the position of poles 具有位于右半平面的極點的閉環(huán)系統(tǒng)是不穩(wěn)定的；2022-5-198 Feedback system with one-pole feedforward amplifier2022-5-1992. Multi-Pole Systems Two-pole system2022-5-1910 Three-pole system2022-5-19113. Phase Margin How far should PX be from GX? let us consider a “marginal” case, e.g. At

4、GX, phase=-175)(1)()(111jHjHjXY5 .11)(1jXY2022-5-1912 How much phase margin is adequate?3 . 1)(1jXY1)(1jXY7 . 0)(1jXY2022-5-19134. Frequency Compensation Methods of increasing PMPX往外推GX往里推2022-5-1914 Frequency compensation: Telescopic cascode op amp shown in Fig. below2022-5-1915 Frequency compensat

5、ion2022-5-1916 Frequency compensation2022-5-1917 Frequency compensationIncreasing Rout does not compensation the op amp.2022-5-1918 Frequency compensation2022-5-19195. Frequency Compensation of Two-Stage Op Amps Poles:2022-5-1920 Miller compensation (密勒補(bǔ)償)CmIpvCgAGB| )0(1 CLmIIoutpCRgR)(1112mIIpLgCW

6、e get（補(bǔ)償前(Cc=0)： ）E111CRoutpLL21CRpCmIpvCgAGB| )0(12022-5-1921 Miller compensation (cont.)60180ccc21zppGBtgarGBtgarGBtgarCmIIzCgLCC22. 0C ，并由令601801 . 0cc902tgarGBtgarp2.210mIImIILCggCC2022-5-1922 Miller compensation (cont.)CmCLzCgCCR9CmCzmCgCRg919)(1CLSmIIpCRRg11LmIIpCg2cmzCg2AV=1,Rout=1/gm2 CCAv=-

7、gmIIR22022-5-1923 Slew of op amps with compensationCssrCIS CssrCIS CDrCIS3CDrCIS52022-5-1924Summary 反饋系統(tǒng)存在潛在不穩(wěn)定性1)(1jsH 單極點系統(tǒng)是穩(wěn)定的 雙極點系統(tǒng)是穩(wěn)定的，但相位裕度不大 三極點（以上）系統(tǒng)是不穩(wěn)定的，需要相位補(bǔ)償 相位裕度PM60deg，可以兼顧穩(wěn)定性和瞬態(tài)反應(yīng)速度 補(bǔ)償方法： 減少極點數(shù) 減小帶寬 密勒補(bǔ)償 ：需要考慮RHZLmIIpCg2CmIpvCgAGB| )0(1CmIIzCg2022-5-1925二級運(yùn)放設(shè)計實例（optional） 約束條件 電源電壓 工藝

8、 溫度2022-5-1926)(2|4251111 ,IgRgAmoutmstvcmCgGB/1THNGSDDinCMVVVV3max,11515min,THNODODSSGSODSSinCMVVVVVVVVcCISR/5totalSSDDdissIVVP)()(|7666262,IgRgAmoutmndvLmpCg/62cmzCg/61 LWCLWKIVOXDOD,22022-5-1927 設(shè)計步驟 0. 確定正確的電路偏置，保證所有晶體管處于飽和區(qū)。2022-5-1928設(shè)計步驟（續(xù)） 1.根據(jù)需要的PM60deg求Cc（假定z10GB） 2.由已知的Cc并根據(jù)轉(zhuǎn)換速率的要求（或功耗要求）

9、選擇ISS（I5）的范圍； 3.由計算得到的電流偏置值(I5 /2),設(shè)計W3/L3（ W4/L4 ）滿足上ICMR（或輸出擺幅）要求，即飽和區(qū)條件； 4. 驗證M3處鏡像極點是否大于10GB 5.設(shè)計W1/L1（ W2/L2 ）滿足GB的要求 6. 設(shè)計W5/L5滿足下ICMR（或輸出擺幅）要求；LCC22. 0C GBCgCCggsmgsgsm102334333330.67gsoxCW L C1/mcGBgC253(4)1/ 2()2poxDDTHnTHpWIICVICMRVVL15112(/)ODGSTHnoxIVICMRVICMRVCWL2022-5-1929 設(shè)計步驟（續(xù)） 7. 根據(jù)p22.2GB 計算得到gm6；并且根據(jù)偏置條件VSG4=VS