1、Tessent Software Version 2019.1 March 2019 1999-2019 Mentor Graphics Corporation All rights reserved. This document contains information that is proprietary to Mentor Graphics Corporation. The original recipient of this documentmay duplicate this documentinwholeor inpart for internalbusinesspurposes

2、 only, providedthat this notice appears in all copies. In duplicating any part of this document, the recipient agrees to make every reasonable effort to prevent the unauthorized use and distribution of the proprietary information. Note - Viewing PDF files within a web browser causes some links not t

3、o function (see MG595892 Use HTML for full navigation. This document is for information and instruction purposes. Mentor Graphics reserves the right to make changesinspecificationsandotherinformationcontainedinthispublicationwithoutpriornotice,andthe reader should, in all cases, consult Mentor Graph

4、ics to determine whether any changes have been made. The terms and conditions governing the sale and licensing of Mentor Graphics products are set forth in written agreements between Mentor Graphics and its customers. No representation or other affirmation offactcontainedinthispublicationshallbedeem

5、edtobeawarrantyorgiverisetoanyliabilityofMentor Graphics whatsoever. MENTOR GRAPHICS MAKES NO WARRANTY OF ANY KIND WITH REGARD TO THIS MATERIAL INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. MENTOR GRAPHICS SHALL NOT BE LIABLE FOR ANY I

6、NCIDENTAL, INDIRECT, SPECIAL, OR CONSEQUENTIAL DAMAGES WHATSOEVER (INCLUDING BUT NOT LIMITED TO LOST PROFITS) ARISINGOUTOFORRELATEDTOTHISPUBLICATIONORTHEINFORMATIONCONTAINEDINIT, EVEN IF MENTOR GRAPHICS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. U.S. GOVERNMENT LICENSE RIGHTS: The software

7、 and documentation were developed entirely at private expense and are commercial computer software and commercial computer software documentation within the meaning of the applicable acquisition regulations. Accordingly, pursuant to FAR 48 CFR 12.212 and DFARS 48 CFR 227.7202, use, duplication and d

8、isclosure by or for the U.S. GovernmentoraU.S.Governmentsubcontractorissubjectsolelytothetermsandconditionssetforthin the license agreement providedwiththesoftware, exceptforprovisions whichare contrary to applicable mandatory federal laws. TRADEMARKS: The trademarks, logos and service marks (Marks)

9、 used herein are the property of Mentor Graphics Corporation or other parties. No one is permittedto use these Marks without the prior written consent of Mentor Graphics or the owner of the Mark, as applicable. The use herein of a third- party Mark is not an attempt to indicate Mentor Graphics as a

10、source of a product, but is intended to indicate a product from, or associated with, a particlar third party. A current list of Mentor Graphics trademarks may be viewed at: HYPERLINK /trademarks.The /trademarks. HYPERLINK /trademarks.The The registered trademark Linux is used pursuant to a sublicens

11、e from LMI, the exclusive licensee of Linus Torvalds, owner of the mark on a world-wide basis. End-User License Agreement: HYPERLINK /eula /eula. Telephone: 503.685.7000 Website: Support Center: HYPERLINK Send Feedback on Documentation: HYPERLINK /doc_feedback_form Revision Changes Status/ Date 12 M

12、odifications to improve the readability and comprehension of the content. Approved by Lucille Woo. All technical enhancements, changes, and fixes listed in the Tessent Release Notes for this product are reflected in this document. Approved by Ron Press. Released Released 11 Modifications to improve

13、the readability and comprehension of the content. Approved by Lucille Woo. All technical enhancements, changes, and fixes listed in the Tessent Release Notes for this product are reflected in this document. Approved by Ron Press. Released Dec 2018 10 Modifications to improve the readability and comp

14、rehension of the content. Approved by Lucille Woo. All technical enhancements, changes, and fixes listed in the Tessent Release Notes for this product are reflected in this document. Approved by Ron Press. Released 9 Modifications to improve the readability and comprehension of the content. Approved

15、 by Lucille Woo. All technical enhancements, changes, and fixes listed in the Tessent Release Notes for this product are reflected in this document. Approved by Ron Press. Released Author:In-houseproceduresandworkingpracticesrequiremultipleauthorsfordocuments.All associated authors for each topic wi

16、thin this dcument are tracked within the Mentor Graphics Technical Publications source. For specific topic authors, contact Mentor Graphics Technical Publication department. Revision History: Released documents maintain a revision history of up to four revisions. For earlier revision history, refer

17、to earlier releases of documentation which are available at the following URL: HYPERLINK March 2019 4 Revision History Chapter 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . What is Design-for-Test?. . . .

18、. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DFT Strategie . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 Top-Down Design Flow with DFT . . . . . . . . . . . . . . . . . . . . . .

19、. . . . . . . . . . . . . . . . . . . . . . Chapter 2 Scan and ATPG Basics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Scan Design Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

20、. . . . . About Scan Design Methodology. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . About Wrapper Chain. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Test Structure Insertion with Tessent Scan. . . .

21、. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ATPG Overvie . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The ATPG Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

22、. . . . . . . . . . .0 Random Pattern Test Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40 Deterministic Pattern Test Generatio. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40 External Pattern Test Generation . . . . .

23、 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41 Mentor Graphics ATPG Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41 Scan Sequential ATPG with the ATPG Too. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

24、.41 Overview of Test Types and Fault Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Test Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44 Functional Test. . . . . . . . . . . . . . .

25、 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44 IDDQ Tes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44 At-Speed Test. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

26、 . . . . . . . . . . . . . . . . . . . . . . .46 Fault Modeling Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47 Test Types and Associated Fault Models. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47 Fault Locati

27、ons. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47 Fault Collapsing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48 Supported Fault Model Type . . . . . . . . . . . .

28、 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 Fault Manipulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54 Overview of Fault Manipulatio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

29、. . . . . . . .54 Fault Manipulation Functionality. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54 About User-Defined Fault Modeling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 User-Defined Fault Modeling Usage Note. . .

30、. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 UDFM File Format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 Creating a User-Defined Fault Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

31、. . .64 Generating UDFM Test Patterns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65 Multiple Detec. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67 Bridge Coverage Estimate . . . . . . . . . .

32、 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67 Embedded Multiple Detec. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69 Tessent Scan and ATPG Users Manual, v2019.1 March 2019 Fault Detection . . . . . . . . . . . . . .

33、 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fault Classe. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Untestable (UT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

34、 . . . . . . . . . . . . . . . . . . . . . . . . Testable (TE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fault Class Hierarch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

35、 . Fault Sub-classe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fault Reportin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Testability Calculation . . . . . . . . .

36、. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Chapter 3 Common Tool Terminology and Concepts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Scan Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

37、 . . . . . . . . . . . . . . . . . Scan Cell. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Master Element. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sl

38、ave Elemen. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Shadow Elemen. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Copy Elemen. . . . . . . . . . . . . . . . . .

39、. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Extra Elemen. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Scan Chains. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

40、 . . . . . . . . . . . . . . . . . . . . . Scan Groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Scan Clocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

41、. . . . Scan Architecture. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Test Procedure Files. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Model Flattening . . . . . .

42、. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Design Object Naming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The Flattening Process . . . . . . . . . . . . . . . . . . . . . . . .

43、. . . . . . . . . . . . . . . . . . . . . . . . . . . . Simulation Primitives of the Flattened Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Learning Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

44、quivalence Relationships . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Logic Behavio. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Implied Relationship. . . . . . . . . . . . . . .

45、. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Forbidden Relationship. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Dominance Relationship. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

46、. . . . . . . . . . . ATPG Design Rules Checkin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . General Rules Checkin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Procedure Rules Checking . . . . .

47、. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bus Mutual Exclusivity Analysi. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Scan Chain Tracing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

48、. . . . . . . . . . . . . . . . . Shadow Latch Identification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Data Rules Checkin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Transparent Latch

49、Identification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Clock Rules Checkin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RAM Rules Checking. . . . . . . . . . . . . . . . . . . . . . . . . . .

50、. . . . . . . . . . . . . . . . . . . . . . . . . . Bus Keeper Analysis. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Extra Rules Checkin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

51、. .1 Scannability Rules Checking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Constrained/Forbidden/Block Value Calculation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Clock Terminology . . . . . . . . . . . . . . . . . . . . . . . .

52、. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Programmable Clock Chopper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Chapter 4 Testability Issues. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

53、 . . . . . . . . . . . . . Synchronous Circuitr. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Asynchronous Circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Scannability Chec

54、kin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Support for Special Testability Cases . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Feedback Loop . . . . . . . . . . . . . . . . . . . . . . . . . . .

55、 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Structural Combinational Loops and Loop-Cutting Method . . . . . . . . . . . . . . . . . . . . . . Structural Sequential Loops and Handlin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Redundant Logic. . . . . .

56、. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Asynchronous Sets and Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gated Clocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

57、 . . . . . . . . . . . . . . . . . . . . . . . . . . Tri-State Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Non-Scan Cell Handling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

58、. . . Clock Divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pulse Generator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . JTAG-Based Circuits . . . . . . . . .

59、 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RAM and ROM Test Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RAM/ROM Support. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

60、. . . . . . . . . . . . . RAM/ROM Support Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Basic ROM/RAM Rules Checks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Incomplete Designs. . . . . . . . . . . . . . . .