1、Copyright 2012, Elsevier Inc. All rights reserved.Chapter 1Fundamentals of Quantitative Design and AnalysisComputer ArchitectureA Quantitative Approach, Fifth EditionFundamentals of Quantitative Design and AnalysCopyright 2012, Elsevier Inc. All rights reserved.I think its fair to say that personal

2、computers have become the most empowering tool weve ever created. Theyre tools of communication, theyre tools of creativity, and they can be shaped by their user. Bill Gates, February 24, 2004 個(gè)人計(jì)算機(jī)是人類迄今創(chuàng)造的最強(qiáng)大工具，我認(rèn)為這種說法并無偏頗。它們是通信工具，是創(chuàng)造工具，是可以由用戶定制的工具。 比爾 蓋茨 2004年2月24日Fundamentals of Quantitative Desi

3、gn and Analysis1.1 Introduction 1.2 Classes of Computers 1.3 Defining Computer Architecture 1.4 Trends in Technology 1.5 Trends in Power and Energy in Integrated Circuits 1.6 Trends in Cost 1.7 Dependability Copyright 2012, Elsevier Inc. All rights reserved.1.8 Measuring, Reporting, and Summarizing

4、Performance 1.9 Quantitative Principles of Computer Design 1.10 Putting It All Together: Performance, Price, and Power 1.11 Fallacies and Pitfalls 1.12 Concluding Remarks 1.13 Historical Perspectives and References Copyright 2012, Elsevier Inc. All rights reserved.Fundamentals of Quantitative Design

5、 and AnalysisCopyright 2012, Elsevier Inc. All rights reserved.Computer TechnologyPerformance improvements:Improvements in semiconductor technologyFeature size, clock speedImprovements in computer architecturesEnabled by HLL compilers, UNIXLead to RISC architecturesTogether have enabled:Lightweight

6、computersProductivity-based managed/interpreted programming languagesIntroduction1.1 Introduction 計(jì)算機(jī)技術(shù)的快速發(fā)展既得益于計(jì)算機(jī)生產(chǎn)技術(shù)的發(fā)展，也得益于計(jì)算機(jī)設(shè)計(jì)的創(chuàng)新。顯著增強(qiáng)了可供計(jì)算機(jī)用戶使用的功能新的計(jì)算平臺(tái)：移動(dòng)終端、倉庫級(jí)計(jì)算機(jī)基于微處理器的計(jì)算機(jī)設(shè)計(jì)對(duì)軟件開發(fā)的影響（以性能換取效率）編譯器和軟件部署的變化:Just-In-Time、Trace-based CompilingSoftware as a Service，SaaSGoogle GogglesWarehouse-scal

7、e computer，WSCCopyright 2012, Elsevier Inc. All rights reserved.Copyright 2012, Elsevier Inc. All rights reserved.Single Processor PerformanceIntroductionRISCMove to multi-processorCopyright 2012, Elsevier Inc. All rights reserved.Current Trends in ArchitectureCannot continue to leverage Instruction

8、-Level parallelism (ILP)Single processor performance improvement ended in 2003New models for performance:Data-level parallelism (DLP)Thread-level parallelism (TLP)Request-level parallelism (RLP)These require explicit restructuring of the applicationIntroduction1.2 Classes of Computers Copyright 2012

9、, Elsevier Inc. All rights reserved.5個(gè)主流計(jì)算機(jī)類別及其系統(tǒng)特征匯總個(gè)人移動(dòng)設(shè)備（PMD） 桌面計(jì)算 服務(wù)器 集群/倉庫級(jí)計(jì)算機(jī) 嵌入式計(jì)算機(jī)Copyright 2012, Elsevier Inc. All rights reserved.Classes of ComputersPersonal Mobile Device (PMD)e.g. start phones, tablet computersEmphasis on energy efficiency and real-timeDesktop ComputingEmphasis on price

10、-performanceServersEmphasis on availability, scalability, throughputClusters / Warehouse Scale ComputersUsed for “Software as a Service (SaaS)”Emphasis on availability and price-performanceSub-class: Supercomputers, emphasis: floating-point performance and fast internal networksEmbedded ComputersEmp

11、hasis: priceClasses of ComputersClusters / Warehouse Scale Computers軟件即服務(wù)（SaaS）應(yīng)用的發(fā)展推動(dòng)了一類被稱為集群的計(jì)算機(jī)的發(fā)展。集群是指一組桌面計(jì)算機(jī)或服務(wù)器通過局域網(wǎng)連接在一起，運(yùn)轉(zhuǎn)方式類似于更大型的計(jì)算機(jī)。每個(gè)節(jié)點(diǎn)運(yùn)行自己的操作系統(tǒng)。節(jié)點(diǎn)之間使用網(wǎng)絡(luò)協(xié)議進(jìn)行通信。最大規(guī)模的集群稱為倉庫級(jí)計(jì)算機(jī)（WSC），它的設(shè)計(jì)方式使數(shù)萬個(gè)服務(wù)器像一個(gè)服務(wù)器一樣運(yùn)行。性價(jià)比和功耗非常關(guān)鍵。WSC與服務(wù)器的均重視可用性，區(qū)別在于：WSC以很多廉價(jià)組件作為構(gòu)建模塊，依靠軟件層來捕獲和隔離在這一級(jí)別進(jìn)行計(jì)算時(shí)發(fā)生的許多故障。WSC的可擴(kuò)

12、展性通過連接這些計(jì)算機(jī)的局域網(wǎng)實(shí)現(xiàn)，而服務(wù)器則是通過集成計(jì)算機(jī)硬件來實(shí)現(xiàn)。超級(jí)計(jì)算機(jī)強(qiáng)調(diào)浮點(diǎn)性能，常用于運(yùn)行大型的、通信 密集的批程序，這些程序可能一次運(yùn)行幾個(gè)星期。這種緊密耦合性決定了超級(jí)計(jì)算機(jī)要使用非常開蘇的內(nèi)部網(wǎng)絡(luò)；而WSC則更重視互動(dòng)應(yīng)用程序、大規(guī)模存儲(chǔ)、可靠性和很高的因特網(wǎng)帶寬。Copyright 2012, Elsevier Inc. All rights reserved.Copyright 2012, Elsevier Inc. All rights reserved.ParallelismClasses of parallelism in applications:Data-

13、Level Parallelism (DLP)Task-Level Parallelism (TLP)Classes of architectural parallelism:Instruction-Level Parallelism (ILP)Vector architectures/Graphic Processor Units (GPUs)Thread-Level ParallelismRequest-Level ParallelismClasses of ComputersCopyright 2012, Elsevier Inc. All rights reserved.Flynns

14、Taxonomy （弗林分類法）Single instruction stream, single data stream (SISD)Single instruction stream, multiple data streams (SIMD)Vector architecturesMultimedia extensionsGraphics processor unitsMultiple instruction streams, single data stream (MISD)No commercial implementationMultiple instruction streams,

15、 multiple data streams (MIMD)Tightly-coupled MIMDLoosely-coupled MIMDClasses of Computers按照指令流和數(shù)據(jù)流的多倍性進(jìn)行分類。Flynn分類法指令流：計(jì)算機(jī)執(zhí)行的指令序列。數(shù)據(jù)流：由指令流調(diào)用的數(shù)據(jù)序列多倍性：在系統(tǒng)受限的部件上，同時(shí)處于同一執(zhí)行階段的指令或數(shù)據(jù)的最大數(shù)目。Flynn分類法把計(jì)算機(jī)系統(tǒng)的結(jié)構(gòu)分為4類(1)單指令流單數(shù)據(jù)流(SISD)(2)單指令流多數(shù)據(jù)流(SIMD)(3)多指令流單數(shù)據(jù)流(MISD)(4)多指令流多數(shù)據(jù)流(MIMD)4類計(jì)算機(jī)的基本結(jié)構(gòu)IS：指令流，DS：數(shù)據(jù)流，CS：控制流

16、，CU：控制部件，PU：處理部件，MM和SM：存儲(chǔ)器。Copyright 2012, Elsevier Inc. All rights reserved.按照指令流和數(shù)據(jù)流的多倍性進(jìn)行分類。4類計(jì)算機(jī)的基本結(jié)構(gòu)Copyright 2012, Elsevier Inc. All rights reserved.Copyright 2012, Elsevier Inc. All rights reserved.1.4 Defining Computer Architecture“Old” view of computer architecture:Instruction Set Architect

17、ure (ISA) designi.e. decisions regarding:registers, memory addressing, addressing modes, instruction operands, available operations, control flow instructions, instruction encoding“Real” computer architecture:Specific requirements of the target machineDesign to maximize performance within constraint

18、s: cost, power, and availabilityIncludes ISA, microarchitecture, hardwareDefining Computer Architecture架構(gòu)師面對(duì)的一些最重要功能需求匯總Copyright 2012, Elsevier Inc. All rights reserved.現(xiàn)代計(jì)算機(jī)體系結(jié)構(gòu)涵蓋了計(jì)算機(jī)設(shè)計(jì)的三個(gè)方面：指令集體系結(jié)構(gòu)組成或微體系結(jié)構(gòu)硬件傳統(tǒng)計(jì)算機(jī)體系結(jié)構(gòu)從7個(gè)方面描述：ISA分類、存儲(chǔ)器尋址、尋址模式、操作數(shù)的類型和大小、操作指令、控制流指令、ISA編碼 多核替代CPU說法Copyright 2012, Else

19、vier Inc. All rights reserved.1.4 Trends in TechnologyIntegrated circuit technologyTransistor density: 35%/yearDie size: 10-20%/yearIntegration overall: 40-55%/yearDRAM capacity: 25-40%/year (slowing)Flash capacity: 50-60%/year15-20X cheaper/bit than DRAMMagnetic disk technology: 40%/year15-25X chea

20、per/bit then Flash300-500X cheaper/bit than DRAMNetwork technology: Network performance depends both on the performance of switches and on the performance of the transmission system. Trends in TechnologyDRAM容量增長速度隨時(shí)間的變化Copyright 2012, Elsevier Inc. All rights reserved.Copyright 2012, Elsevier Inc. A

21、ll rights reserved.Bandwidth and LatencyBandwidth or throughputTotal work done in a given time10,000-25,000X improvement for processors300-1200X improvement for memory and disksLatency or response timeTime between start and completion of an event30-80X improvement for processors6-8X improvement for

22、memory and disksTrends in TechnologyCopyright 2012, Elsevier Inc. All rights reserved.Bandwidth and LatencyLog-log plot of bandwidth and latency milestonesTrends in Technology微處理器、存儲(chǔ)器、網(wǎng)絡(luò)和磁盤在過去2040年期間的性能里程碑Copyright 2012, Elsevier Inc. All rights reserved.經(jīng)驗(yàn)法則：帶寬的增長速度延遲改進(jìn)速度的平方。Copyright 2012, Elsevie

23、r Inc. All rights reserved.Transistors and Wires（晶體管性能與連線的發(fā)展）Feature sizeMinimum size of transistor or wire in x or y dimension10 microns in 1971 to .032 microns in 2011Transistor performance scales linearlyWire delay does not improve with feature size!Integration density scales quadraticallyTrends

24、in TechnologyCopyright 2012, Elsevier Inc. All rights reserved.Power and Energy（集成電路中的功率和能耗趨勢(shì)）Problem: Get power in, get power outThermal Design Power (TDP)Characterizes sustained power consumptionUsed as target for power supply and cooling systemLower than peak power, higher than average power cons

25、umptionClock rate can be reduced dynamically to limit power consumptionEnergy per task is often a better measurementTrends in Power and EnergyCopyright 2012, Elsevier Inc. All rights reserved.Dynamic Energy and Power（能耗和功率）Dynamic energyTransistor switch from 0 - 1 or 1 - 0 x Capacitive load x Volta

26、ge2Dynamic power x Capacitive load x Voltage2 x Frequency switchedReducing clock rate reduces power, not energyTrends in Power and Energy例題分析Copyright 2012, Elsevier Inc. All rights reserved.Copyright 2012, Elsevier Inc. All rights reserved.PowerIntel 80386 consumed 2 W3.3 GHz Intel Core i7 consumes

27、 130 WHeat must be dissipated from 1.5 x 1.5 cm chipThis is the limit of what can be cooled by airTrends in Power and EnergyCopyright 2012, Elsevier Inc. All rights reserved.Reducing Power（降低功率）Techniques for reducing power:Do nothing well（以逸待勞）Dynamic Voltage-Frequency Scaling 動(dòng)態(tài)電壓-頻率調(diào)整Low power st

28、ate for DRAM, disks 針對(duì)典型情景的設(shè)計(jì)Overclocking, turning off cores（超頻）Trends in Power and EnergyCopyright 2012, Elsevier Inc. All rights reserved.Static PowerStatic power consumptionCurrentstatic x VoltageScales with number of transistorsTo reduce: power gatingTrends in Power and EnergyCopyright 2012, Els

29、evier Inc. All rights reserved.Trends in CostCost driven down by learning curveYieldDRAM: price closely tracks costMicroprocessors: price depends on volume10% less for each doubling of volumeTrends in CostCopyright 2012, Elsevier Inc. All rights reserved.Integrated Circuit CostIntegrated circuitBose

30、-Einstein formula:Defects per unit area = 0.016-0.057 defects per square cm (2010)N = process-complexity factor = 11.5-15.5 (40 nm, 2010)Trends in CostIntel Core i7微處理器芯片內(nèi)部結(jié)構(gòu)Copyright 2012, Elsevier Inc. All rights reserved.300mm晶圓片Copyright 2012, Elsevier Inc. All rights reserved.Copyright 2012, El

31、sevier Inc. All rights reserved.Dependability（可信任度）Module reliabilityMean time to failure (MTTF)Mean time to repair (MTTR)Mean time between failures (MTBF) = MTTF + MTTRAvailability = MTTF / MTBFDependability服務(wù)等級(jí)協(xié)議（SLA）或服務(wù)等級(jí)目標(biāo)（SLO）系統(tǒng)在SLA規(guī)定的兩種服務(wù)狀態(tài)：（服務(wù)實(shí)現(xiàn)和服務(wù)中斷）之間切換。狀態(tài)之間的轉(zhuǎn)換由故障或恢復(fù)導(dǎo)致，由此得到可信任度的兩種主要度量：模塊可靠性

32、和模塊可用性量化估計(jì)一個(gè)系統(tǒng)的可靠性的例子（假設(shè)故障之間互相獨(dú)立）Copyright 2012, Elsevier Inc. All rights reserved.應(yīng)對(duì)故障的主要方法 冗余（或時(shí)間冗余）：量化冗余的例子Copyright 2012, Elsevier Inc. All rights reserved.Copyright 2012, Elsevier Inc. All rights reserved.Measuring Performance（性能測(cè)量）Typical performance metrics:Response timeThroughputSpeedup of X

33、 relative to YExecution timeY / Execution timeXExecution timeWall clock time: includes all system overheadsCPU time: only computation timeBenchmarksKernels (e.g. matrix multiply)Toy programs (e.g. sorting)Synthetic benchmarks (e.g. Dhrystone)Benchmark suites (e.g. SPEC06fp, TPC-C)Measuring Performan

34、ceCopyright 2012, Elsevier Inc. All rights reserved.Principles of Computer DesignTake Advantage of Parallelism（充分利用并行性）e.g. multiple processors, disks, memory banks, pipelining, multiple functional unitsPrinciple of Locality（局部性原理）Reuse of data and instructionsFocus on the Common Case（重點(diǎn)關(guān)注常見情形）Amdahls Law（Amdahl 定律）Principles（計(jì)算機(jī)設(shè)計(jì)的量化原理）加快某部件執(zhí)行速度所能獲得的系統(tǒng)性能加速比，受限于該部件的執(zhí)行時(shí)間占系統(tǒng)中總執(zhí)行時(shí)間的百分比。加速比依賴于兩個(gè)因素：可改進(jìn)比例和部件加速比Copyright 2012, Elsevier Inc. All rights reserved.Principles of Computer DesignPrinciplesDifferent instruction types having different CPIsCopyright 2012, Elsevier Inc. All rights re