CMOS工藝技術(shù)

CSMC-HJWaferFabricationProcessTechnologyCMOSCMOSStartingwithasiliconwaferCrossSectionoftheSiliconWaferMagnifyingtheCrossSectionCMOSn/p-wellFormationGrowThinOxideDepositNitrideDepositResistsiliconsubstrateUVExposureDevelopResistEtchNitriden-wellImplantRemoveResistCMOSn/p-wellFormationsiliconsubstrateGrowOxide(n-well)RemoveNitridep-wellImplantRemoveOxideTwin-wellDrive-inp-welln-wellRemoveDrive-InOxidesiliconsubstratep-welln-wellCMOSLOCOSIsolationGrowThinOxideDepositNitrideDepositResistUVExposureDevelopResistEtchNitrideRemoveResistCMOSLOCOSIsolationsiliconsubstratep-welln-wellDepositResistUVExposureDevelopResistFieldImplantBRemoveResistGrowFieldOxideFoxRemoveNitrideRemoveOxidesiliconsubstratep-welln-wellGrowScreenOxideCMOSTransistorFabricationVtImplantDepositResistUVExposureDevelopResistPunchthroughImplantRemoveResistRemoveOxideFoxsiliconsubstratep-welln-wellGrowGateOxideCMOSTransistorFabricationDepositPolySiPolySiImplantpolySipolySiDepositResistUVExposureDevelopResistEtchPolySiRemoveResistFoxsiliconsubstratep-welln-wellCMOSTransistorFabricationDepositThinOxideDepositResistUVExposureDevelopResistn-LDDImplantRemoveResistFoxpolySipolySisiliconsubstratep-welln-wellCMOSTransistorFabricationDepositResistUVExposureDevelopResistp-LDDImplantRemoveResistDepositSpacerOxideEtchSpacerOxideFoxpolySipolySisiliconsubstratep-welln-wellCMOSTransistorFabricationDepositResistUVExposureDevelopResistn+S/DImplantn+n+RemoveResistFoxpolySipolySisiliconsubstratep-welln-wellCMOSTransistorFabricationDepositResistUVExposureDevelopResistp+S/DImplantp+p+RemoveResistFoxpolySipolySin+n+siliconsubstratep-welln-wellCMOSContacts&InterconnectsDepositBPTEOSBPTEOSBPSGReflowPlanarizationEtchbackDepositResistUVExposureDevelopResistContactEtchbackRemoveResistFoxpolySipolySin+n+p+p+siliconsubstratep-welln-wellCMOSContacts&InterconnectsDepostMetal1Metal1DepositResistUVExposureDevelopResistEtchMetal1RemoveResistFoxpolySipolySip+p+n+n+BPTEOSsiliconsubstratep-welln-wellCMOSContacts&InterconnectsDepositIMD1IMD1DepositSOGSOGPlanarizationEtchbackDepositResistUVExposureDevelopResistViaEtchRemoveResistFoxpolySipolySip+p+Metal1n+n+BPTEOSsiliconsubstratep-welln-wellCMOSContacts&InterconnectsDepositMetal2Metal2Metal2DepositResistUVExposureDevelopResistEtchMetal2RemoveResistDepositPassivationFoxpolySipolySip+p+Metal1n+n+BPTEOSIMD1SOGPassivation附：CMOSProcessCMOS工藝集成電路CMOS集成電路工藝

--以P阱硅柵CMOS為例1。光刻I---阱區(qū)光刻，刻出阱區(qū)注入孔N-SiN-SiSiO2CMOS集成電路工藝

--以P阱硅柵CMOS為例2。阱區(qū)注入及推進(jìn)，形成阱區(qū)N-SiP-CMOS集成電路工藝

--以P阱硅柵CMOS為例3。去除SiO2，長薄氧，長Si3N4N-SiP-Si3N4CMOS集成電路工藝

--以P阱硅柵CMOS為例4。光II---有源區(qū)光刻N(yùn)-SiP-Si3N4CMOS集成電路工藝

--以P阱硅柵CMOS為例5。光III---N管場區(qū)光刻，N管場區(qū)注入，以提高場開啟，減少閂鎖效應(yīng)及改善阱的接觸。光刻膠N-SiP-B+CMOS集成電路工藝

--以P阱硅柵CMOS為例6。光III---N管場區(qū)光刻，刻出N管場區(qū)注入孔；N管場區(qū)注入。N-SiP-CMOS集成電路工藝

--以P阱硅柵CMOS為例7。光Ⅳ---p管場區(qū)光刻，p管場區(qū)注入，調(diào)節(jié)PMOS管的開啟電壓，生長多晶硅。N-SiP-B+CMOS集成電路工藝

--以P阱硅柵CMOS為例8。光Ⅴ---多晶硅光刻，形成多晶硅柵及多晶硅電阻多晶硅N-SiP-CMOS集成電路工藝

--以P阱硅柵CMOS為例9。光ⅤI---P+區(qū)光刻，P+區(qū)注入。形成PMOS管的源、漏區(qū)及P+保護(hù)環(huán)。N-SiP-B+CMOS集成電路工藝

--以P阱硅柵CMOS為例10。光Ⅶ---N管場區(qū)光刻，N管場區(qū)注入，形成NMOS的源、漏區(qū)及N+保護(hù)環(huán)。光刻膠N-SiP-AsCMOS集成電路工藝

--以P阱硅柵CMOS為例11。長PSG（磷硅玻璃）。PSGN-SiP+P-P+N+N+CMOS集成電路工藝

--以P阱硅柵CMOS為例12。光刻Ⅷ---引線孔光刻。PSGN-SiP+P-P+N+N+CMOS集成電路工藝

--以P阱硅柵CMOS為例13。光刻Ⅸ---引線孔光刻（反刻AL）。PSGN-SiP+P-P+N+N+VDDINOUTPNSDDS集成電路中電阻1ALSiO2R+PP+P-SUBN+R-VCCN+-BLN-epiP+基區(qū)擴(kuò)散電阻集成電路中電阻2SiO2RN+P+P-SUBRN+-BLN-epiP+發(fā)射區(qū)擴(kuò)散電阻集成電路中電阻3基區(qū)溝道電阻SiO2RN+P+P-SUBRN+-BLN-epiP+P集成電路中電阻4外延層電阻SiO2RP+P-