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IPC-6018D

2022-February

QualificationandPerformanceSpecificationforHighFrequency(Microwave)PrintedBoards

SupersedesIPC-6018C

July2016

AninternationalstandarddevelopedbyIPC

ThePrinciplesofStandardization

InMay1995theIPC’sTechnicalActivitiesExecutiveCommittee(TAEC)adoptedPrinciplesofStandardizationasaguidingprincipleofIPC’sstandardizationefforts.

StandardsShould:

ShowrelationshiptoDesignforManufacturability(DFM)andDesignfortheEnvironment(DFE)

Minimizetimetomarket

Containsimple(simplified)language

Justincludespecinformation

Focusonendproductperformance

Includeafeedbacksystemonuseandproblemsforfutureimprovement

StandardsShouldNot:

Inhibitinnovation

Increasetime-to-market

Keeppeopleout

Increasecycletime

Tellyouhowtomakesomething

Containanythingthatcannotbedefendedwithdata

Notice

IPCPositionStatementonSpecificationRevisionChange

Whyisthereachargefor

thisdocument?

IPCStandardsandPublicationsaredesignedtoservethepublicinterestthrougheliminatingmisunderstandingsbetweenmanufacturersandpurchasers,facilitatinginterchangeabilityandimprovementofproducts,andassistingthepurchaserinselectingandobtainingwithminimumdelaytheproperproductforhisparticularneed.ExistenceofsuchStandardsandPublicationsshallnot

inanyrespectprecludeanymemberornonmemberofIPCfrommanufacturingorsellingproductsnotconformingtosuchStandardsandPublication,norshalltheexistenceofsuchStandardsandPublicationsprecludetheirvoluntaryusebythoseotherthanIPCmembers,whetherthestandardistobeusedeitherdomesticallyorinternationally.

RecommendedStandardsandPublicationsareadoptedbyIPCwithoutregardtowhethertheiradoptionmayinvolvepatentsonarticles,materials,orprocesses.Bysuchaction,IPCdoesnotassumeanyliabilitytoanypatentowner,nordotheyassumeanyobligationwhatevertopartiesadoptingtheRecommendedStandardorPublication.Usersarealsowhollyresponsibleforprotectingthemselvesagainstallclaimsofliabilitiesforpatentinfringement.

ItisthepositionofIPC’sTechnicalActivitiesExecutiveCommitteethattheuseandimplementationofIPCpublicationsisvoluntaryandispartofarelationshipenteredintobycustomerandsupplier.WhenanIPCpublicationisupdatedandanewrevisionispublished,itistheopinionoftheTAECthattheuseofthenewrevisionaspartofanexistingrelationshipisnotautomaticunlessrequiredbythecontract.TheTAECrecommendstheuseofthelatestrevision.AdoptedOctober6,1998

Yourpurchaseofthisdocumentcontributestotheongoingdevelopmentofnewandupdatedindustrystandardsandpublications.Standardsallowmanufacturers,customers,andsupplierstounderstandoneanotherbetter.Standardsallowmanufacturersgreaterefficiencieswhentheycanset

uptheirprocessestomeetindustrystandards,allowingthemtooffertheircustomerslowercosts.

IPCspendshundredsofthousandsofdollarsannuallytosupportIPC’svolunteersinthestandardsandpublicationsdevelopmentprocess.Therearemanyroundsofdraftssentoutforreviewand

thecommitteesspendhundredsofhoursinreviewanddevelopment.IPC’sstaffattendsandparticipatesincommitteeactivities,typesetsandcirculatesdocumentdrafts,andfollowsallnecessaryprocedurestoqualifyforANSIapproval.

IPC’smembershipdueshavebeenkeptlowtoallowasmanycompaniesaspossibletoparticipate.Therefore,thestandardsandpublicationsrevenueisnecessarytocomplementduesrevenue.Thepricescheduleoffersa50%discounttoIPCmembers.IfyourcompanybuysIPCstandardsandpublications,whynottakeadvantageofthisandthemanyotherbenefitsofIPCmembershipaswell?FormoreinformationonmembershipinIPC,pleasevisit

orcall847/597-2872.

Thankyouforyourcontinuedsupport.

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?Copyright2021.IPCInternational,Bannockburn,Illinois.AllrightsreservedunderbothinternationalandPan-Americancopyrightconventions.Anycopying,scanningorotherreproductionofthesematerialswithoutthepriorwrittenconsentofthecopyrightholderisstrictlyprohibitedandconstitutesinfringementundertheCopyrightLawoftheUnitedStates.

IPC-6018D

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QualificationandPerformanceSpecificationforHighFrequency(Microwave)PrintedBoards

DevelopedbytheHighSpeed/HighFrequencyBoardPerformanceSubcommittee(D-22)oftheHighSpeed/HighFrequencyCommittee(D-20)ofIPC

Supersedes:

IPC-6018C–Juy2016

IPC-6018B–November2011IPC-6018A–January2002IPC-6018–January1998

Usersofthispublicationareencouragedtoparticipateinthedevelopmentoffuturerevisions.

Contact:

IPC

3000LakesideDrive,Suite105NBannockburn,Illinois

60015-1249

Tel847615.7100

Fax847615.7105

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Acknowledgment

Anydocumentinvolvingacomplextechnologydrawsmaterialfromavastnumberofsourcesacrossmanycontinents.WhiletheprincipalmembersoftheHighSpeed/HighFrequencyBoardPerformanceSubcommittee(D-22)oftheHighSpeed/HighFrequencyCommittee(D-20)areshownbelow,itisnotpossibletoincludeallofthosewhoassistedintheevolutionofthisstandard.Toeachofthem,themembersoftheIPCextendtheirgratitude.

HighSpeed/HighFrequencyCommittee

ChairLanceAuer

ConductorAnalysisTechnology,Inc.

Vice-ChairDonDeGroot

ConnectedCommunityNetworks,Inc.

HighSpeed/HighFrequencyBoardPerformanceSubcommittee

ChairLanceAuer

ConductorAnalysisTechnology,Inc.

VicechairMahendraGandhi

NorthropGrummanSpaceSystems

TechnicalLiaisonoftheIPCBoardofDirectors

BobNeves

Microtek(Changzhou)Laboratories

HighSpeed/HighFrequencyBoardPerformanceSubcommittee

ElizabethAllisonNTS-Baltimore

JennaAverhoffCollinsAerospace

ScottBowles

LockheedMartinCorporation

StevenBowles

LockheedMartinCorporation

MarkBuechnerBAESystems

DonDupriest

LockheedMartinMissiles&FireControl

TimothyEstesConductorAnalysisTechnologies,Inc.

GaryFerrari

EPTACCorporation

AynFuller

NorthropGrummanCorporation

TimothyGlaze

HughesCircuits,Inc.

VickaHammill

HoneywellInc.AirTransportSystems

PhilipHenaultRaytheon

JonathanHerbert

NorthropGrummanCorporation

JoeHughes

HughesCircuits,Inc.

KevinKusiak

LockheedMartinCorporation

MinsuLee

KoreaPrintedCircuitAssociation

JeffLewis

HoladayCircuitsInc.

DanLoewL3Harris

JamesMonarchioTTMTechnologies

KristopherMoyer

CaliforniaStateUniversity-Sacramento

StevenMurray

NorthropGrummanCorporation

GlennOliver

LockheedMartinMissile&FireControl

GerryPartida

SummitInterconnect-Anaheim

BenjaminPiepgrass

SouthwestResearchInstitute

PaulPorter

LockheedMartinCorporation

RandyReed

R.ReedConsultancyLLC

OwenReid

LockheedMartinMissiles&FireControl

JoseRiosRaytheon

ThomasRomontIFTEC

EdwardSandor

AGCNelcoAmerica,Inc.

JosephSchmidt

RaytheonMissileDefense

RussellShepherdNTS-Anaheim

BhanuSood

NASAGoddardSpaceFlightCenter

BrianStevensCollinsAerospace

IngridSwenson

TTMTechnologies,Inc.

CrystalVanderpanULLLC

JesseVaughanAmericanComputerDevelopment,Inc.

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TableofContents

SCOPE 1

Scope 1

Purpose 1

PerformanceClassificationandTypes 1

Classifications 1

PrintedBoardType 1

SelectionforProcurement 1

Material,PlatingProcessandFinalFinish 3

TermsandDefinitions 4

WhiteSpots 4

Hybrid(Composite)PrintedBoard 4

AsAgreedBetweenUserandSupplier

(AABUS) 4

HighDensityInterconnects(HDI) 4

Back-Drilling 4

Interpretation 4

Presentation 4

DesignDataProtection 4

RevisionLevelChanges 5

MasterDrawing 5

APPLICABLEDOCUMENTS 5

IPC 5

JointIndustryStandards 6

Federal 6

ASTMInternational4 6

UnderwritersLab 7

NationalElectricalManufacturersAssociation 7

AmericanSocietyforQuality 7

AMS 7

AmericanSocietyofMechanicalEngineers8 7

REQUIREMENTS 7

General 7

MaterialsUsedinthisSpecification 7

LaminatesandBondingMaterialforMultilayerorMixedDielectricPrintedBoards 7

ExternalBondingMaterials 7

OtherDielectricMaterials 7

MetalFoils 7

MetalCore/Backed 8

BaseMetallicPlatingDepositionsand

ConductiveCoatings 8

FinalFinishDepositionsandCoatings-

MetallicandNon-Metallic 8

PolymerCoating(SolderMask) 11

FusingFluidsandFluxes 12

MarkingInks 12

HoleFillInsulationMaterial 12

Metaland/orComposite,External 12

ViaProtection 12

EmbeddedPassiveMaterials 12

Visual 12

EdgesofMicrowavePrintedBoards 12

LaminateImperfections 12

PlatingandCoatingVoidsintheHole 13

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LiftedLands 13

Marking 13

Solderability 14

PlatingAdhesion 14

EdgePrintedBoardContact,Junctionof

GoldPlatetoSolderFinish 15

Back-DrilledHoles 15

Workmanship 15

PrintedBoardDimensionalRequirements 15

HoleSize,HolePatternAccuracy,

PatternFeatureAccuracyandSlots 15

AnnularRingandBreakout(External) 16

BowandTwist 18

ConductorDefinition 18

ConductorWidthsandThicknesses

andSpacing 18

ConductiveSurfaces 19

StructuralIntegrity 21

ThermalStressTesting 22

RequirementsforMicrosectioned

CouponsorPrintedBoards 23

SolderMaskRequirementson

nonPTFElaminates 36

SolderMaskCoverage 36

SolderMaskCureandAdhesion 37

SolderMask 37

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ElectricalRequirements 37

DielectricWithstandingVoltage 37

ElectricalContinuityandIsolationResistance 37

CircuitShorts 37

Circuit/PTHShortstoMetalSubstrate 38

MoistureandInsulationResistance(MIR) 38

DielectricWithstandingVoltage 38

Cleanliness 38

CleanlinessPriortoSolderMaskApplication 38

CleanlinessAfterSolderMask,Solder,orAlternativeSurfaceCoatingApplication 38

CleanlinessofInnerLayersAfterOxideTreatmentPriortoLamination 38

SpecialRequirements 38

Outgassing 38

FungusResistance 38

Vibration 38

MechanicalShock 39

ImpedanceTesting 39

CoefficientofThermalExpansion(CTE) 39

ThermalShock 39

SurfaceInsulationResistance(AsReceived) 39

WireBondAdhesion 39

DieBondAdhesion 39

ReworkSimulation 39

MetalCore(HorizontalMicrosection) 39

PeelStrengthRequirements

(ForFoilLaminatedConstructionOnly) 40

DestructivePhysicalAnalysis 40

LapShear 40

DesignDataProtection 40

Repair 40

CircuitRepairs 40

Rework 40

QUALITYASSURANCEPROVISIONS 40

General 40

Qualification 40

SampleTestCoupons 40

AcceptanceTests 41

C=0ZeroAcceptanceNumberSamplingPlan 41

RefereeTests 42

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QualityConformanceTesting 42

CouponSelection 42

PACKAGING 47

NOTES 47

OrderingData 47

SupersededSpecifications 47

Figures

Figure1-1 ExampleofaBack-drilledHole

(NotToScale) 4

Figure1-2 ExampleofaShallowBack-drill 4

Figure3-1 MicroviaDefinition 8

Figure3-2 AdhesiveBandNearExposedConductor 15

Figure3-3 AnnularRingMeasurement(External) 17

Figure3-4 Breakoutof90°and180° 17

Figure3-5 UsageofModifiedLandShapesin

BreakoutConditions 17

Figure3-6 ExampleofIntermediateTargetLand

inaMicrovia 17

Figure3-7 ConductorEdgeDefinitions 18

Figure3-8 RectangularSurfaceMountLands 20

Figure3-9 RoundSurfaceMountLands 20

Figure3-10PrintedBoardEdgeConnectorLands 21

Figure3-11PlatedHoleMicrosection

(Grinding/Polishing)Tolerance 22

Figure3-12AnExampleofPlatingtoTarget

LandSeparation 22

Figure3-13SeparationsatExternalFoil 24

Figure3-14CrackDefinition 24

Figure3-15PlatingFolds/Inclusions–

MinimumMeasurementPoints 25

Figure3-16ExamplesofThermalZonesforMicrosectionEvaluationof

LaminateAttributes 25

Figure3-17MeasurementforDielectricRemoval 26

Figure3-18EtchbackinContactwithPTFELayer 26

Figure3-19MeasurementLocationsforPTFE

ResinSmear 27

Figure3-20MeasurementforNegativeEtchback 27

Figure3-21AnnularRingMeasurement(Internal) 28

Figure3-22MicrosectionRotationsfor

BreakoutDetection 28

Figure3-23ComparisonofMicrosectionRotations 28

Figure3-24ExampleofNon-ConformingDielectricSpacingReductionDuetoBreakoutatMicroviaTargetLand 28

Figure3-25SurfaceCopperWrapMeasurementfor

FilledHoles(OverFoil) 29

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Figure3-26SurfaceCopperWrapMeasurementfor

FilledHoles(OverLaminate) 29

Figure3-27WrapCopper(Acceptable) 29

Figure3-28WrapCopperRemovedby

ExcessiveProcessing,e.g.,

Sanding/Planarization/Etching

(NotAcceptable) 29

Figure3-29CopperCapThickness 30

Figure3-30CopperCapFilledViaHeight(Bump) 30

Figure3-31CopperCapDepression(Dimple) 30

Figure3-32CopperCapPlatingVoids 30

Figure3-33NonconformingViafillBetween

CopperCapPlatingLayers 31

Figure3-34AcceptableViaFillBetweenCopperCapPlatingLayers 31

Figure3-35ExampleofAcceptableVoidingina

CapPlated,CopperFilledVia 31

Figure3-36ExampleofAcceptableVoidinginaCopperFilledMicroviawithoutCapPlating 31

Figure3-37ExampleofNonconformingVoidina

CapPlated,CopperFilledMicrovia 32

Figure3-38ExampleofNonconformingVoidina

CopperFilledMicrovia 32

Figure3-39MicroviaContactDimension 32

Figure3-40ExclusionofSeparationsinMicrovia

TargetLandContactDimension 32

Figure3-41UnintendedPiercingofMicrovia

TargetLand(LaserDrilled) 33

Figure3-42IntentionalPiercingofMicrovia

TargetLand(MechanicallyDrilled) 33

Figure3-43MetalCoretoPTHSpacing 34

Figure3-44MeasurementofMinimum

DielectricSpacing 35

Figure3-45FillMaterialinBlind/Through

ViasWhenCapPlatingNotSpecified 35

Figure3-46VoidinFillMaterialat

HoleWallInterface 35

Figure3-47Overhang 36

Tables

Table1-2 TechnologyAdderExamples 2

Table3-1 MetalCoreSubstrate 8

Table3-2 MaximumLimitsofSnPbSolder

BathContaminant 9

Table3-3 FinalFinish,Platingand

CoatingRequirements 10

Table3-4 Surface5andHoleCopperPlatingMinimumRequirementsfor

BuriedVias>2Layers,Through-Holes,

andBlindVias1 11

Table3-5 SurfaceandHoleCopperPlatingMinimumRequirementsforMicrovias

(BlindandBuried)1 11

Table3-6 HoleCopperPlatingMinimumRequirementsforBuriedViaCores

(2layers) 11

Table3-7 PlatingandCoatingVoids

VisualExamination 13

Table3-8 EdgeBoardContactGap 15

Table3-9 MinimumAnnularRing 16

Table3-10 MaximumPercentofAllowable

ConductorWidthDeviations 18

Table3-11 PercentofAllowableConductorSpaceDeviations 19

Table3-12 PercentofAllowableConductorWidthReductionCausedByPinHoles 19

Table3-13 PercentofReductionInDielectric

MaterialThickness 19

Table3-14 PlatedHoleIntegrityAfterStress 23

Table3-15 CapPlatingRequirementsfor

FilledHoles 30

Table3-16 MicroviaContactDimension

(LaserDrilled) 32

Table3-17 MicroviaContactDimension

(MechanicallyDrilled) 32

Table3-18 InternalLayerFoilThickness

afterProcessing 33

Table3-19 ThicknessofExternalConductoroftheFinishedPrintedBoardafterPlating 34

Table3-20 SolderMaskAdhesion 37

Table3-21 DielectricWithstandingVoltages 37

Table3-22 InsulationResistance 38

Table4-1 QualificationTestCoupons 41

Table4-2 C=0SamplingPlanperLotSize 42

Table4-3 AcceptanceTestingandFrequency 43

Table4-4 QualityConformanceTesting1 47

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QualificationandPerformanceSpecificationforHighFrequency(Microwave)PrintedBoards

SCOPE

ScopeThisspecificationcoversendproductinspectionandtestofhighfrequency(microwave)printedboardsformicrostrip,stripline,mixeddielectricandmultilayerstriplineapplicationswithorwithoutburied/blindvias,andmetalcores.

Theprintedboardmaycontainembeddedactiveorpassivecircuitrywithdistributivecapacitiveplanes,capacitiveorresistivecomponentsconformingtoIPC-6017.TheprintedboardmaycontainbuildupHighDensityInterconnect(HDI)layers.

PurposeThepurposeofthisspecificationistoproviderequirementsforqualificationandperformanceofhighfrequency(microwave)printedboards.

PerformanceClassificationandTypes

ClassificationsThisspecificationestablishesacceptancecriteriafortheperformanceclassificationofhighfrequencyprintedboardsbasedoncustomerand/orend-userequirements.PrintedboardsareclassifiedbyoneofthreegeneralPerformanceClassesasdefinedinIPC-6011.

RequirementDeviationsRequirementsdeviatingfromtheseheritageclassificationsshallbeasagreedbetweenuserandsupplier(AABUS).

SpaceandMilitaryAvionicsRequirementDeviations

SpaceandmilitaryavionicsperformanceclassificationdeviationsareprovidedintheIPC-6018DSAddendumandareapplicablewhentheaddendumisspecifiedwithintheprocurementdocumentation.

PrintedBoardTypeThisspecificationwilldefineeighttypesofhighfrequency(microwave)printedboards.

Type1–SingleSided

Type2–DoubleSided

Type3–HomogeneousDielectricMultilayerConstruction

Type4–MixedDielectricMultilayer

Type5–HomogeneousDielectricMultilayerwithblindand/orburiedvias

Type6–MixedDielectricMultilayerwithblindand/orburiedvias

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Type7–Metaland/orcompositebackedprintedboards,singlesidedordoublesided

Type8–Multilayermetaland/orcompositebackedorcoreprintedboardswithorwithoutblindand/orburiedvias

SelectionforProcurementForprocurementpurposes,PerformanceClassshallbespecifiedintheprocurementdocumentation.

Thedocumentationshallprovidesufficientinformationtothesuppliersothathecanfabricatetheprintedboardandensurethattheuserreceivesthedesiredproduct.InformationthatshouldbeincludedintheprocurementdocumentationistobeinaccordancewithIPC-2611andIPC-2614.

Theprocurementdocumentationshouldspecifythethermalstresstestmethodtobeusedtomeettherequirementof3.6.1.Selection

shallbefromthosedepictedin,.1,and.Ifnotspecified(see6.1),thedefaultshallbeperTable1-1.

Duringtheselectionprocess,theusershouldtakeintoconsiderationthefollowingwhendeterminingtheappropriatethermalstresstestmethod:

Wavesolder,selectivesolder,handsolderassemblyprocesses(seeand.1)

ConventionalSnPbreflowprocesses(see)

Lead-freereflowprocesses(see)

IPC-6016,asectionalperformancespecificationforHDIprintedboards,wascanceledbytheIPC.RelevantHDIconformanceandacceptancecriteriahasbeentransferredtothisrevisionofthisspecification.

TheadditionofIPC-2221AppendixAconformancecoupons(beginningwithRevisionBofthedesignstandard)bytheprintedboardmanufacturertothemanufacturingpanelshallbeAABUS.

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Selection(Default)Theprocurementdocumentationshallspecifythoserequirementsthatarearesultoftheselectionprocesswithinthisspecification.Thisincludesallreferencesto“AABUS”.Iftherequirementselectionisnotmadeinaccordancewiththeprocurementdocumentation,OrderingData(see6.1),CustomerDrawingand/orsuppliercontrolplan(SCP),thenthedefaultrequirementinTable1-1shallapply.

Table1-1DefaultRequirements

Category

DefaultSelection

PerformanceClass

Class2

FinalFinish

FinishX(Electrodepositedtinlead,fusedorsoldercoated)oralternateFinishENIGallowedondesigns(drawings)with

InitialReleaseonorafterJanuary01,2021.

MinimumStartingfoil

1/2oz.ForallinternalandexternallayersexceptforType1whichshallstartwith1ounce.ForplatedHDIlayers–?oz.foralllayers(internalorexternal)

Copperfoiltype

Electrodeposited

HoleDiametertolerancesPlated,componentsPlated,viaonly

Non-plated

()100m[3,937μin]

(+)80m[3150μin],(-)norequirement,maybetotallyorpartiallyplugged

()80m[3,150μin]

ConductorWidthDeviation

Class2deviationper

ConductorSpacingDeviation

Class2deviationper

DielectricSeparation

90m[3,543μin]minimumper

LateralConductorSeparation

100m[3,937μin]minimum

MarkingInk

Contrastingcolor,nonconductive

SolderMask

Notappliedifnotspecified

SolderabilityTest

Category2forSnPbandCategoryAforPb-freeofJ-STD-003,tin-leadsolderper3.3.6

ThermalStressTest

IPC-TM-650,Method2.6.8,ConditionAper

SolderMaskSpecified

ClassTofIPC-SM-840ifclassnotspecified

TestVoltage,IsolationResistance

PerIPC-9252

SelectionSystemOptionalThefollowingproductselectionidentifiersystemisprovidedforclarificationofthebuildtype.

QualitySpecification,thegenericqualityspecificationSpecification,thebaseperformancespecificationType,theproducttypeper1.3.2

Platingprocess,theplatingprocessper

FinalFinish,thefinalfinishcodeper

SelectiveFinish,theselectivefinishcodeadderper,enter“-“whennoselectivefinishisrequired.Productclassification,theproductclassificationper1.3.1orperformancespecificationsheetTechnologyAdder,thetechnologyadderisspecifiedinTable1-2.Addmultiplecodesasrequired

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Table1-2TechnologyAdderExamples

TechnologyCode

Technology

HDI

HDIbuild-upfeatures

VP

ViaProtection

WBP

WireBondablePads

AMC

ActiveMetalCore

NAMC

NonactiveMetalCores

HF

ExternalHeatframe

EP

EmbeddedPassivesperIPC-6017

VIP-C

Via-in-PadConductiveFill

VIP-N

Via-in-PadNonconductiveFill

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Material,PlatingProcessandFinalFinish

LaminateMaterial

Laminatematerialisidentifiedbynumbersand/orletters,classes,typesasspecifiedbytheappropriatespecificationlistedintheprocurementdocumentation.

PlatingProcessThecopperplatingprocesswhichisusedtoprovidethemainconductorintheholesisidentifiedbyonenumberasfollows:

Acidcopperelectroplatingonly

Pyrophosphatecopperelectroplatingonly

Acidand/orpyrophosphatecopperelectroplating

Additive/electrolesscopper

ElectrolessNickelunderplatewithacidand/orpyrophosphatecopperelectroplating

FinalFinishandCoatingsThefinalfinish/coatingcanbeoneofthefinishes/coatingsspecifiedbeloworacombinationofseveralplatingsandisdependentonassemblyprocessesandend-use.Ifrequired,thethicknessshallbespecifiedintheprocurementdocumentation.Ifnotspecified,thethicknessshallbeaslistedinTable3-3.CoatingthicknessmaybeexemptedinTable3-3(i.e.,tin-leadplateorsoldercoating).Designatorsforfinalfinishareasfollows:

SolderCoating (Table3-3)

ElectrodepositedTin-Lead,(fused) (Table3-3)

X EitherTypeSorT (Table3-3)

TLU ElectrodepositedTin-Lead(unfused) (Table3-3)

b1 Lead-freeSolderCoating (Table3-3)

G GoldElectroplateforEdgePrintedBoardConnectors (Table3-3)

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GS GoldElectroplateforAreastobeSoldered (Table3-3)

GWB-1 GoldElectroplateforareastobewirebonded(ultrasonic) (Table3-3)

GWB-2 GoldElectroplateforareastobewirebonded(thermosonic) (Table3-3)

N NickelforEdgePrintedBoardConnectors (Table3-3)

NB NickelasaBarriertoCopper-TinDiffusion (Table3-3)

OSP OrganicSolderabilityPreservative (Table3-3)

HTOSP HighTemperatureOSP (Table3-3)

ENIG ElectrolessNickelImmersionGold (Table3-3)

ENEPIG ElectrolessNickel/ElectrolessPalladium/ImmersionGold (Table3-3)

DIG DirectImmersionGold (Table3-3)

NBEG NickelBarrier/ElectrolessGold (Table3-3)

IAg ImmersionSilver (Table3-3)

ISn ImmersionTin (Table3-3)

C BareCopper (Table3-3)

SMOBC SolderMaskoverBareCopper.(3.2.8)

SM SolderMaskoverNon-MeltingMetal.(3.2.8)

SM-LPI LiquidPhotoimageableSolderMaskoverNon-MeltingMetal.(3.2.8)

SM-DF DryFilmSolderMaskoverNon-MeltingMetal.(3.2.8)

SM-TM ThermalMaskSolderMaskoverNon-MeltingMetal.(3.2.8)Y Other(1)

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NoreproductionornetworkingpermittedwithoutlicensefromIHSMarkit

Licensee=/,User=,NotforResale,

TermsandDefinitionsTermsanddefinitionsshallbeinaccordancewithIPC-T-50,andasdefinedin1.4.1through1.4.6.

WhiteSpotsSubsurfacewhiteortranslucentspotsoccurringinwovenglassPTFEattheglassknucklesafterprocessing.Thisdiffersfrommeaslesandcrazinginthattheresinisnotfractured.

Hybrid(Composite)PrintedBoardMixeddielectricmultilayerprintedboard.

AsAgreedBetweenUserandSupplier(AABUS)Indicatesadditionaloralternaterequirementstobedecidedbetweentheuserandthesupplierintheprocurementdocumentation.Examplesincludecontractualrequirements,modificationstopurchasedocumentationandinformationonthedrawing.Agreementscanbeusedtodefinetestmethods,conditions,frequencies,categoriesoracceptancecriteriawithinatest,ifnotalreadyestablished.

HighDensityInterconnects(HDI)Designswithanaverageof20electricalconnections/cm2(130electricalconnections/in2)onbothsidesoftheprintedboard.Thesedesignstypicallyhavevias(≤0.15mm[0.006in.]),conductorwidthandspacing≤100μm[0.004in.],viainSMTpads,and/orthindielectricthicknesswheremicrovias(see3.2.6)areemployed.

1.4.5Back-DrillingAmethodofreducingtheoveralllengthofanyplatedholebydrillingoutaportionoftheplatedholefrom

eithersidetoapredetermined

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