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1、MSP430 Timers and Clocks2Time-based ControlMany embedded systems are used to control things based on time or that have time constraintsTraffic light controllerPower meterPacemaker (心跳節(jié)律器)Subway collision avoidance systemAirbag.How to track real (wall clock) time?3Recall First MSP430 Program #include
2、 void main(void) WDTCTL = WDTPW + WDTHOLD; / Stop watchdog timer P1DIR |= 0 x41; / set P1.0 & 6 to outputs /(red & green LEDs) for(;) volatile unsigned int i; P1OUT = 0 x41; / Toggle P1.0 & 6 using XOR i = 50000; / Delay do (i-); while (i != 0); How much time?4Problems Regarding TimeUsing software d
3、elay loops Waste of processor because it is not available for other operationsDifficult to translate into actual timeGiven a time for the delay, difficult to translate into number of iterationsThe delays are unpredictable, e.g., compiler optimization, interruptsWe need an independent reference of ti
4、me!5Reference of TimeThe simplest hardware to provide a reference of time is a counter that counts every fixed unit of time timerThe actual time can be obtained by multiplying the counter with the clock interval time The accuracy and stability of the clock is criticalWhere to put the timers?CounterC
5、lock6Make Timer an IO Device!7Timers Being IO DevicesHave internal registers with addresses in the memory space for the CPU to accessTypical Registers in a TimerThe counter itselfTarget for countingControl settingsOthers: clock source selection, flags8CounterTarget TimeComparatorControlOutlineBasic
6、concepts of timersMSP430 timersAn example of using MSP430 Timer_AClocks in MSP430910MSP430 TimersUsually contain several timers, including:Timer_AA 16-bit counter, TAR, with three pare registers.Watchdog timerCount up and reset MSP430 when it reaches its limitThe code must keep clearing the counter
7、before the limit is reached to prevent a resetProtect system against failure of software, such as unintended, infinite loops11Registers in Timer_ATAR (0 x0170): the counter itselfTACCR0 (0 x0172): target for countingTACTL (0 x0160): control settingsOthers: clock source selection, flagsTimer_A Contro
8、l Register (TACTL)TASSELx: Timer_A clock source selectIdx: input dividerMCx: mode controlTACLR: Timer_A clearTAIE: Timer_A interrupt enableTAIFG: Timer_A interrupt flag12Sample Code 1 for Timer_AGoal: simplest way to flash an LED at 1HzNeed an event to trigger the flashing counter (TAR) overflowNeed
9、 a way to detect the event CPU pollingHow to make TAR overflow at 1 Hz?Use SMCLK clock (discussed later) at 800 KHzWhen TAR (16 bits) overflows, it has counted 216, equivalent to a period of 216/800KHz 0.08 secDivide the frequency of the clock by 8 to give a period of about 0.66 sec close enough!Con
10、tinuously count up; on overflow return to 01314Sample Code 1 for Timer_A#define LED1 BIT0void main (void) WDTCTL = WDTPW|WDTHOLD; / Stop watchdog timer P1OUT = LED1; P1DIR = LED1; TACTL = MC_2|ID_3|TASSEL_2|TACLR; /Setup Timer_A for (;) / Loop forever while (TACTL&TAIFG) = 0) / Wait overflow / doing
11、 nothing TACTL&=TAIFG; / Clear overflow flag P1OUT = LED1; / Toggle LEDs / Back around infinite loopSample Code Settings ExplainedThe following symbols are defined in header file:MC_2: set MC of TACTL to 10 (continuous mode)ID_3: set ID of TACTL to 11 (divide freq. by 8)TASSEL_2: set TASSEL to 10 (u
12、se SMCLK)TACLR: clear the counter, the divider, and the direction of the count15Sample Code 2 for Timer_ACan have more accurate time if we can control the amount to countThe maximum desired value of the count is programmed into TACCR0TAR starts from 0 and counts up to the value in TACCR0, after whic
13、h it returns to 0 and sets TAIFGThus the period is TACCR0+1 countsWith SMCLK (800KHz) divided down to 100 KHz, we need 50,000 counts for a delay of 0.5 sec store 49,999 in TACCR016OutlineBasic concepts of timersMSP430 timersAn example of using MSP430 Timer_AClocks in MSP4301718Theoretically, One Clo
14、ck Is EnoughA clock source, e.g. crystal, to drive CPU directly and it is divided down by a factor of 2 or 4 for the main bus and rest of circuit boardBut, systems have conflicting requirementsLow power, fast start/stop, accurateDifferent Requirements for ClocksDevices often in a low-power mode unti
15、l some event occurs, then must wake up and handle event rapidlyClock must get to be stabilized quicklyDevices also need to keep track of real time: (1) can wake up periodically, or (2) time-stamp external eventsTherefore, two kinds of clocks often needed:A fast clock to drive CPU, which can be start
16、ed and stopped rapidly but need not be particularly accurateA slow clock that runs continuously to monitor real time, which must use little power and be accurate20Different Requirements for ClocksDifferent clock sources also have different characteristicsCrystal: accurate and stable (w.r.t. temperat
17、ure or time); expensive, delicate, drawing large current, external component, longer time to start up/stabilizeResistor and capacitor (RC): cheap, quick to start, integrated within MCU and sleep with CPU; poor accuracy and stabilityCeramic resonator and MEMS clocks in betweenNeed multiple clocks 21C
18、locks in MSP430MSP430 addresses the conflicting demands for high performance, low power, precise frequency by using 3 internal clocks, which can be derived from up to 4 sourcesMaster clock (MCLK): for CPU & some peripherals, normally driven by digitally controlled oscillator (DCO)Subsystem master cl
19、ock (SMCLK): distributed to peripherals, normally driven by DCOAuxiliary clock (ACLK): distributed to peripherals, normally for real-time clocking, normally driven by a low-frequency crystal oscillator, typically at 32 KHzFrom Sources to ClocksVery Low Power/Low Frequency Oscillator (VLO): 12kHzCrys
20、tal oscillator (LFXT1): 32768 Hz (external)Digitally Controlled Oscillator (DCO): slowest 1 MHz (default)VLO and LFXT1 are mutual exclusive as source of MCLKand ACLKTypical sources of clocks:MCLK, SMCLK: DCO (typically at 1.1 MHz)ACLK: LFXT 1 (typically at 32 KHz)24Controlling ClocksIn MSP430, the B
21、asic Clock Module is also an IO peripheralBeing an IO peripheral, it can be controlled by registers, DCOCTL and BCSCTL13DCOCTL: configure DCOBasic clock system control 1: configure ACLKBasic clock system control 2: configure MCLK, SMCLKBasic clock system control 3: control LFXT1/VLODCOCTLDCOCTL = CA
22、LDCO_1MHZ; / Set DCO step + modulationTag-Length-ValueDCOxMODxTag-Length-ValueTag-Length-Value (TLV) stores the device-specific information.BCSCTL1BCSCTL1 = CALBC1_1MHZ; / Set rangeBCSCTL2BCSCTL2 |= SELM_3 + DIVM_3; / MCLK = VLO/8 MCLKSMCLKBCSCTL3BCSCTL3 |= LFXT1S_2; / Enable VLO as MCLK/ACLK srcIn
23、MSP430G2553Interrupt Flag Register 1 (IFG1)OFIFG oscillator-fault flag is set when an oscillator fault (LFXT1OF) is detected. IFG1 &= OFIFG; / Clear OSCFault flagSample code 1 for Clock System#include msp430g2553.hvoid main(void)WDTCTL = WDTPW + WDTHOLD; / Stop watchdog timerP1DIR = 0 x40; / P1.6 Output (Green LED)P1OUT = 0; / LED off BCSCTL3 |= LFXT1S_2; /
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