1.Fundamentalsof1.FundamentalsofComputerArchitecture計(jì)算機(jī)系統(tǒng)構(gòu)造的根本原理LayersofComputerSystem計(jì)算機(jī)的層次ApplicationLanguageMachineM5應(yīng)用語(yǔ)言機(jī)High-LevelLanguageMachineM4高級(jí)語(yǔ)言機(jī)AssemblyLanguageMachineM3匯編語(yǔ)言機(jī)OperatingSystemMachineM2操作系統(tǒng)機(jī)ConventionalMachineM1傳統(tǒng)機(jī)MicroprogramMachineM0微程序機(jī)每個(gè)層次執(zhí)行相關(guān)的功能子集。每個(gè)層次要依靠于下一個(gè)低層去執(zhí)行更原始的功能。這就將問題分解成更易處理的子問題。M2M5的層次是虛擬機(jī)。〔能理解一組簡(jiǎn)潔的操作集合，稱為微指令集。ComputerArchitectureandImplementation計(jì)算機(jī)的系統(tǒng)構(gòu)造和實(shí)現(xiàn)ComputerArchitecture計(jì)算機(jī)系統(tǒng)構(gòu)造Referstothoseattributesofasystemvisibletoaprogrammer,orthoseattributeshavedirectimpactonlogicalexecutionofprogram.程序員可見，或者對(duì)程序執(zhí)行有直接影響的屬性Implementation實(shí)現(xiàn)Twocomponents:Organizationandhardware.兩個(gè)組件:組織和硬件Organization(組織):includeshigh-levelaspectsofacomputer’sdesign,suchas:memorysystem,busstructure,internalCPU.組織(組織):包括高級(jí)方面的計(jì)算機(jī)的設(shè)計(jì),如:內(nèi)存系統(tǒng),CPU。Hardware(硬件):referstothespecificsofamachine,include:detailedlogicdesignandpackagingtechnology.硬件(硬件):指機(jī)器的細(xì)節(jié),包括:具體的規(guī)律設(shè)計(jì)和包裝技術(shù)。ArchitecturalAttributes系統(tǒng)構(gòu)造方面的屬性instructionset, 指令集I/Omechanisms, I/O機(jī)制techniquesforaddressingmemory尋址技術(shù)numberofbitsrepresentingvariousdatatype(numbers,characters) 表示各種數(shù)據(jù)類型的位數(shù)(數(shù)值、字符)OrganizationalAttributes組織方面的屬性Hardwaredetailstransparenttotheprogrammer.

于程序透亮的硬件細(xì)節(jié)suchas:controlsignalscomputer/peripheralinterfaces計(jì)算機(jī)/外設(shè)接口memorytechnology存儲(chǔ)技術(shù)HardwareAttributes硬件方面的屬性packagingtechnology封裝技術(shù)power功耗cooling冷卻ArchitecturalDesignIssue系統(tǒng)構(gòu)造設(shè)計(jì)問題Whetheracomputerwillhaveamultiplyinstruction.是否要有一個(gè)乘法指令OrganizationalIssue組織設(shè)計(jì)問題Whethertheinstructionwillbeimplementedbyaspecialmultiplyunitorbyrepeateduseoftheaddunit. 是承受乘法單元還是承受加法單元迭代使用Thedecisionmaybebasedontheanticipatedfrequencyofuseofthemultiplyinstruction,therelativespeedofthetwoapproaches,andthecostandphysicalsizeofaspecialmultiplyunit.決策取決于乘法指令使用頻率，兩種方法的相對(duì)速度，乘法單元的本錢和大小TheTaskofAComputerDesigner計(jì)算機(jī)設(shè)計(jì)者的任務(wù)Determinewhatattributesareimportantforanewmachine. 確定哪些屬性是重要的Designamachinetomaximizeperformance(性能)whilestayingwithincost(本錢)andpower(功耗)constraints,設(shè)計(jì)一臺(tái)機(jī)器來(lái)最大化性能,并保持在本錢和力氣約束including:instructionsetdesign指令集設(shè)計(jì)，functionalorganization功能設(shè)計(jì)，logicdesign規(guī)律設(shè)計(jì)，implementation(實(shí)現(xiàn)):ICdesign,package,coolingTheyhavetodeterminethefunctionalrequirements:majortask:功能需求是主要的Therequirementsmaybespecificfeaturesinspiredbythemarket. 由市場(chǎng)打算的某個(gè)特性Applicationsoftwareoftendrivesthechoiceofcertainfunctionalrequirements.應(yīng)用軟件驅(qū)動(dòng)Thepresenceofalargemarketforaparticularclassofapplicationsmightencouragethedesignerstoincorporaterequirements. 應(yīng)用驅(qū)動(dòng)MeasuringandReportingPerformance測(cè)量和報(bào)告性能Whenwesayonecomputerisfasterthananother,whatdowemean? 快的涵義？Theusermaysayacomputerisfasterwhenaprogramrunsinlesstime.thecomputercentermanagermaysayacomputerisfasterwhenitcompletesmorejobsinanhour.計(jì)算機(jī)中心經(jīng)理：在一小時(shí)內(nèi)做更多工作responsetime(響應(yīng)時(shí)間)—Thecomputeruserisinterestedinreducingexecutiontime(執(zhí)行時(shí)間)—thetimebetweenthestartandthecompletionofaneventthroughput(吞吐量)—thetotalamountofworkdoneinagiventime.X比Y快n倍：n=

????ecutiontime??????ecutiontime??

=Performance??Performance??1

執(zhí)行時(shí)間 性能=n=?? ??=n=執(zhí)行時(shí)間 性能?? ??=性能MeasuringPerformance測(cè)量性能Evenexecutiontimecanbedefinedindifferentways:執(zhí)行時(shí)間的不同定義wall-clocktime,responsetime,orelapsedtime,whichisthelatencytocompleteatask,includingdiskaccesses,memoryaccesses,input/outputactivities,operatingsystemoverhead.時(shí)鐘時(shí)間、響應(yīng)時(shí)間,或運(yùn)行時(shí)間,這是延遲完成一個(gè)任務(wù),包括磁盤訪問,內(nèi)存的訪問、輸入/輸出,操作系統(tǒng)開銷。CPUtime(CPU時(shí)間)：meansthetimeCPUiscomputing,notincludingthetimewaitingforI/Oorrunningotherprograms.CPU時(shí)間:CPU計(jì)算時(shí)間,其中還不包括時(shí)間等待I/O或運(yùn)行其他程序。CPUtimecanbefurtherdividedinto:CPU時(shí)間可以進(jìn)一步分為:rUe用戶U時(shí)間eUetnemU花在這個(gè)程序的時(shí)間systemCPUtime(CPU時(shí)間)：theCPUtimespentintheoperatingsystemperformingtasksrequestedbytheprogram,called).CPU花在操作系統(tǒng)執(zhí)行任務(wù)所要求的工程ChoosingProgramstoEvaluatePerformance選擇程序來(lái)評(píng)估性能Fourlevelsofprogramslistedbelowindecreasingorderofaccuracyofprediction. 四個(gè)層次的程序,按準(zhǔn)確度從高到底的次序Realapplications真實(shí)應(yīng)用input,output,andoptions有輸入、輸出、可選項(xiàng)Kernels核心程序keypieces關(guān)鍵片段最便于辨析出機(jī)器單個(gè)特性的性能Toybenchmarks玩具測(cè)試基準(zhǔn)Syntheticbenchmarks合成測(cè)試基準(zhǔn) 匹配程序中操作和操作數(shù)的平均頻率BenchmarkSuites測(cè)試基準(zhǔn)程序puttogethercollectionsofbenchmarkstomeasuretheperformanceofprocessorswithavarietyofapplications把集合的基準(zhǔn)來(lái)測(cè)量性能的處理器與各種應(yīng)用程序Akeyadvantageofsuchsuitesisthattheweaknessofonebenchmarkislessenedbythepresenceofotherbenchmarks互補(bǔ)Benchmarksuitsaremadeofcollectionsofprograms,someofwhichmaybekernels,butmanyofwhicharetypicallyrealprograms有些是核心程序,但很多是真實(shí)程序ReportingPerformanceResults報(bào)告性能結(jié)果Theguidingprincipleofreportingperformancemeasurementsshouldbereproducibility報(bào)告的指導(dǎo)原則的性能測(cè)量應(yīng)再現(xiàn)性requiresafairlycompletedescriptionofthemachine,thecompilerflags,aswellasthepublicationofboththebaselineandoptimizedresults需要一個(gè)相當(dāng)完整的描述機(jī)器,編譯器標(biāo)志,以及出版的兩個(gè)基線和優(yōu)化結(jié)果containstheactualperformancetimes,shownbothintabularformandasagraph包含實(shí)際的表現(xiàn)時(shí)期,顯示兩個(gè)表格形式和圖表ComparingandSummarizingPerformance比較和總結(jié)性能battlesarefoughtoverwhatisthefairwaytosummarizerelativeperformanceofacollectionofprograms.什么是公正的方法：競(jìng)爭(zhēng)TotalExecutionTime:AConsistentSummaryMeasure總體執(zhí)行時(shí)間Thissummarytracksexecutiontime,ourfinalmeasureofperformance.執(zhí)行時(shí)間:最終性能度量Anaverageoftheexecutiontimeisthearithmeticmean:平均執(zhí)行時(shí)間WeightedExecutionTime加權(quán)執(zhí)行時(shí)間第一種方法：對(duì)每個(gè)程序賜予權(quán)值

1∑?? ???????????? ??1????1weightedarithmeticmean:加權(quán)算數(shù)平均值∑????1

?????????????×??????????NormalizedExecutionTimeandtheProsandConsofGeometricMeans歸一化執(zhí)行時(shí)間，以及幾何平均值的優(yōu)劣其次種方法：利用歸一化的執(zhí)行時(shí)間實(shí)際性能=歸一化數(shù)×參考機(jī)性能Averagenormalizedexecutiontimecanbeexpressedaseitheranarithmeticorgeometricmean.√可承受算數(shù)或幾何平均值??∏??√??1

??????????????????????????????????????幾何平均值的好性質(zhì):幾何平均值的比率與比率的幾何平均值一樣????????????????????????????(????) ????????????????????????????????(????)

??????????????????????????( )??Incontrasttoarithmeticmeans,geometricmeansofnormalizedexecutiontimesareconsistentnomatterwhichmachineisthereference. Hence,thearithmeticmeanshouldnotbeusedto.平均值。harmonicmean≤geometricmean≤arithmeticmean調(diào)和均值≤幾何均值≤算數(shù)均值A(chǔ)dvantage:geometricmeanisindependentoftherunningtimesofindividualprograms,anditdoesn’tmatterwhichmachineisusedtonormalize. 優(yōu)點(diǎn)：與各個(gè)程序運(yùn)行時(shí)間無(wú)關(guān)，與承受哪一個(gè)機(jī)器進(jìn)展歸一化無(wú)關(guān)Drawback:geometricmeansviolateourfundamentalprincipleofperformancemeasurement—theydonotpredictexecutiontime. 缺點(diǎn)：違反了性能測(cè)量的根本原理QuantitativePrinciplesofComputerDesign計(jì)算機(jī)設(shè)計(jì)的量化原理MakeCommonCaseFast 使常見狀況更快照看常常發(fā)生的狀況Amdahl’sLaw 阿姆達(dá)爾定律TheperformancegainobtainedbyimprovingsomeportionofacomputercanbecalculatedusingAmdahl’sLaw得到的性能改善的一局部電腦可以計(jì)算使用Amdahl法則定義：Amdahl’sLawstatesthattheperformanceimprovementtobegainedfromusingsomefastermodeofexecutionislimitedbythefractionofthetimethefastermodecanbeused.阿姆達(dá)爾定律的涵義:由某些局部加速所得到的性能提高受加速局部的百分率所限。加速比：Speedup=

系統(tǒng)性能系統(tǒng)性能

總執(zhí)行時(shí)間=改進(jìn)前=總執(zhí)行時(shí)間改后前加速比取決于兩個(gè)因素：能加速的局部Fractionenhanced≤1能加速的程度Speedupenhanced≤1總執(zhí)行時(shí)間改進(jìn)后

=總執(zhí)行時(shí)間改進(jìn)前

×[1 ?可改進(jìn)比例+可改進(jìn)比例]部件加速比]=

總執(zhí)行時(shí)間=總執(zhí)行時(shí)間改進(jìn)后

11 ?可改進(jìn)比例+可改進(jìn)比例部件加速比回報(bào)遞減法則：Amdahl’sLawexpressesthelawofdiminishingreturns:Theincrementalimprovementinspeedupgainedbyanadditionalimprovementinjustaportionofthecomputationdiminishesasimprovementsareadded.對(duì)于一局部性能的提高，總體加速比的提高呈遞減推論：AnimportantcorollaryofAmdahl’sLawisthatifanenhancementisonlyusableforafractionofatask,wecan’tspeedupthetaskbymorethanthereciprocalof1minusthatfraction. 總體加速比有上界TheCPUPerformanceEquationCPU性能方程兩種表達(dá)方式：CPU=總時(shí)鐘周期數(shù)×=總時(shí)鐘周期數(shù)時(shí)鐘頻率CPI每條指令時(shí)鐘數(shù)=總時(shí)鐘周期數(shù)????指令數(shù)執(zhí)行時(shí)間公式：CUP=CPI×IC×=

CPI×IC時(shí)鐘頻率CPUperformanceisdependentupon:clockcycle(orrate),CPI,andIC。CPU性能取決于:時(shí)鐘周期(或比率),CPI,IC很難轉(zhuǎn)變一個(gè)參數(shù)而不影響其它參數(shù)：Clockcycletime--Hardwaretechnologyandorganization時(shí)鐘周期：硬件技術(shù)和組織CPI--OrganizationandISA CPIISA〔指令系統(tǒng)〕Instructioncount--ISAandcompilertechnology IC：指令系統(tǒng)和編譯器技術(shù)MeasuringtheComponentsofCPUPerformanceCPU性能的各組成局部Todeterminetheclockcycle:確定時(shí)鐘周期iseasyforanexistingCPU. CPU：簡(jiǎn)潔Low-leveltools,calledtimingestimatorsortimingverifiers,areusedforacompleteddesign.已完成：用時(shí)延估量器或時(shí)延驗(yàn)證器foradesignthatisnotcompleted,byexaminingthecriticalpathsinadesign.未完成；用關(guān)鍵路徑Measuringtheinstructioncount:測(cè)量指令數(shù)compilertogetherwithtoolsthatmeasuretheinstructionsetbehavior.編譯器及測(cè)量指令集行為的工具firstway:byinstructionsetsimulatorthatinterpretstheinstructions—slowbutcanmeasurealmostanyaspectofinstructionsetbehavioraccurately. 用指令集模擬器：慢secondway:usesexecution-basedmonitoring.thebinaryprogramismodifiedtoincludeinstrumentationcode—veryfast,sinceprogramisexecuted,ratherthaninterpreted用基于執(zhí)行的監(jiān)視：快。MeasuringtheCPICPILocalityofReference 引用局部性Programstendtoreusedataandinstructionstheyhaveusedrecently工程往往重用數(shù)據(jù)和指令最近他們已經(jīng)使用的ClassificationofComputerArchitecture計(jì)算機(jī)系統(tǒng)構(gòu)造的分類SISD(singleinstructionstreamoverasingledatastream)單指令流單數(shù)據(jù)流SIMD(singleinstructionstreamovermultipledatastream)單指令流多數(shù)據(jù)流MIMD(multipleinstructionovermultipledatastreams)多指令流多數(shù)據(jù)流MISD(multipleinstructionstreamsandasingledatastream)多指令流單數(shù)據(jù)流mostparallelcomputersbuiltinthepastassumedtheMIMDmodelforgeneral-purposecomputations.MIMD模型為通用計(jì)算。2.InstructionSet指令集TheSIMDandMISDmodelsaremoresuitableforspecial-purposecomputations.2.InstructionSet指令集ClassifyingInstructionSetArchitecture 指令集分類ThetypeofinternalstorageintheCPUisthemostbasicdifferentiation.內(nèi)部存儲(chǔ)的類型是最根本的區(qū)分Majorchoicesareastack,anaccumulator,orasetofregisters.CUPCUO單元：堆棧、累加器、存放器組Operandsmaybenamedexplicitlyorimplicitly: 操作數(shù)是明確或隱含命名的三種構(gòu)造karchitecture:ynepaccumulatorarchitecture:edsyeaccumulator.作數(shù)是累加器本身general-purposeregisterarchitectures(GPR):haveonlyexplicitoperands--eitherregistersorys兩類存放器機(jī)register-memoryarchitecture存放器-存儲(chǔ)器體系構(gòu)造load-storeorregister-registerarchitecture.存放器-存放器體系構(gòu)造memory-memoryarchitecture.存儲(chǔ)器-存儲(chǔ)器體系構(gòu)造，現(xiàn)在沒有通用存放器計(jì)算機(jī)的優(yōu)勢(shì)First,registersarefasterthanmemory. 快Second,registersareeasierforacompilertouseandcanbeusedmoreeffectively. 易于有效使用Moreimportantly,registerscanholdvariables.Thenthememorytrafficreduces,theprogramspeedsup(faster),thecodedensityimproves(namedwithfewerbits).存放變量，內(nèi)存流量削減，程序加速，代碼密度提高TwomajorcharacteristicsdivideGPRarchitectures. GPR按特性劃分WhetheranALUinstructionhastwoorthreeoperands. ALU有兩個(gè)還是三個(gè)操作數(shù)？three-operandformat:aresultandtwosourceoperands三個(gè)操作數(shù)的指令，包含兩個(gè)源操作數(shù)和一個(gè)目的操作數(shù)Oneoftheoperandsisbothasourceandaresultfortheoperation.一個(gè)操作數(shù)既作為源操作數(shù)，又作為目的操作數(shù)howmanyoftheoperandsmaybememoryaddresses. 有多少操作數(shù)可以是存儲(chǔ)地址？Typicallyfromnonetothree.0-3個(gè)InterpretingMemoryAddress 解釋存儲(chǔ)地址Howisamemoryaddressinterpreted?存儲(chǔ)地址是如何被解釋的？byteaddressedandprovideaccessforbytes(8bits),halfwords(16bits),andwords(32bits),doublewords(64bits). 字節(jié)尋址,可訪問字節(jié)、半字、字、雙字twodifferentconventionsfororderingthebyteswithinaword. 兩種字中字節(jié)的排序LittleEndianbyteorderputsthebytewhoseaddressis“x...x00”attheleast-significantpositionintheword(thelittleend). 小端字節(jié)序：低地址裝最低有效數(shù)BigEndianbyteorderputsthebytewhoseaddressis“x...x00”atthemost-significantpositionintheword(thebigend). 高端字節(jié)序：低地址裝最高有效數(shù)Byteorderisaproblemwhenexchangingdataamongmachineswithdifferentorderings.不同字節(jié)序機(jī)器交互數(shù)據(jù)有問題AddressModes 尋址模式計(jì)算機(jī)如何規(guī)定地址anconstant, aregister,ora inlocationinmemory. 常數(shù),存放器,存儲(chǔ)地址Theactualmemoryaddressspecifiediscalledtheeffectiveaddress.有效地址：實(shí)際指定的內(nèi)存地址havetheabilitytosignificantlyreduceinstructioncounts; 降低指令數(shù)量alsoaddtothecomplexityofbuildingamachine.增加了簡(jiǎn)單性mayincreasetheaverageCPIofcomputersthatimplementthosemodes.CPItheusageofvariousaddressingmodesisquiteimportantinhelpingthearchitectchoosewhattoinclude.選擇很重要DisplacementAddressingMode位移尋址模式therangeofdisplacementsused.位移范圍多大Choosingthedisplacementfieldsizesisimportantbecausetheydirectlyaffecttheinstructionlength.選擇位移字段的大小是很重要的,由于他們直接影響指令長(zhǎng)度。ImmediateorLiteralAddressingMode 馬上或文字尋址Immediatescanbeusedinarithmeticoperations,incomparisons(primarilyforbranches),andinmoveswhereaconstantiswantedinaregister. 可用于算數(shù)、比較、移動(dòng)不是全部的操作都支持therangeofvaluesforimmediates.馬上數(shù)的范圍Likedisplacementvalues,thesizesofimmediatevaluesaffectinstructionlengths.像位移值一樣，馬上數(shù)大小也影響指令大小AsthefollowingFigureshows,immediatevaluesthataresmallaremostheavilyused.小馬上數(shù)最常使用Largeimmediatesaresometimesused,however,mostlikelyinaddressingcalculations.大馬上數(shù)有時(shí)用，多用于地址計(jì)算Summary:MemoryAddressing總結(jié):存儲(chǔ)器尋址Anewarchitectureshouldsupportatleast:displacement,immediate,andregisterdeferred.theyrepresent75%to99%oftheaddressingmodes.的、存放器延遲、以上三種代表了75%-99%的尋址模式。Thesizeoftheaddressfordisplacementmodeshouldbeatleast12to16bits,thesesizeswouldcapture75%to99%ofthedisplacements. 121675%-99%。Thesizeoftheimmediatefieldshouldbeatleast8to16bits.thesesizeswouldcapture50%to80%oftheimmediates.81650%-80%。OptimizingInstructionFormats優(yōu)化指令格式instructionformatlength指令格式長(zhǎng)度Thisdecisionaffects,andisaffectedby,memorysize,memoryorganization,busstructure,CPUcomplexity,andCPUspeed,CPU的簡(jiǎn)單性和CPU速度影響。Thedecisiondeterminestherichnessandflexibilityofthemachineasseenbytheassembly languageprogrammer. 打算了機(jī)器的豐富性、敏捷性Foragiveninstructionlength,thereisclearlyatradeoffbetweenthenumberofopcodesandthepoweroftheaddressingcapability. 操作碼數(shù)和尋址力量的折中取舍OpcodesRepresentation 操作碼表示Fixed-lengthOpcodes 固定長(zhǎng)度的操作碼hastheadvantagesofsimplehardwaredecodingandregularity.Butitwastesofspace.解碼簡(jiǎn)潔、規(guī)章、鋪張空間Huffmancoding哈夫曼編碼TheideabehindHuffmancodingissimplytouseshorterbitpatternsformorecommoncharacters. 用更少的位表示更常消滅的字符variablecodewordlength,helpstodecreasetheamountofredundancy,itmakesdatacompressionpossible變長(zhǎng)編碼,降低冗余,實(shí)現(xiàn)數(shù)據(jù)壓縮prefixcodes(前綴碼)：nocodewordisaprefixofanyothercodeword任何碼字都不是其他碼字的前綴Prefixcodesareusefulbecausetheymakeastreamofbitsunambiguous.無(wú)二義性Prefixcodesalwayscanbeusedtoachievetheoptimalcompressionforacharactercode.能到達(dá)最正確壓縮Huffmancodinghastheleastaveragebitspatternandredundancy,butwithirregularcodingstructure.哈夫曼碼的位數(shù)最少,冗余最小,但構(gòu)造不整齊ExtendedOpcodes 擴(kuò)展碼Extendedopcodesaresupposedasthetrade-off. 擴(kuò)展碼是一個(gè)折中NumberofOperants操作數(shù)Wecouldhaveeitherthreeoperants,twooperants,oneoperantexplicitinstructionformatorzerooperantimplicitinstructionformat.指令可有三個(gè)、兩個(gè)、一個(gè)顯式的操作數(shù)，或者有零個(gè)隱含的操作數(shù)Wecoulduseindirectaddressing,registerindirectaddressinganddisplacementaddressingmodetoshortenoperantlength.可用間接尋址、存放器間接尋址、位移尋址來(lái)縮短操作數(shù)長(zhǎng)度EncodingAnInstructionSet指令集編碼Theoperationistypicallyspecifiedinonefield,calledtheopcode.操作碼：一個(gè)字段的指定操作implementationdecisionishowtoencodeaddressingmodes.如何對(duì)尋址模式編碼Formachineswithalargecombinationsofoperants×addressingmodes,typicallyaseparateaddressspecifierisneededforeachoperand:ittellswhataddressingmodeisusedtoaccesstheoperand.操作數(shù)×尋址模式的組合量大,用尋址標(biāo)識(shí)符Theotherextremeisloadstoremachinewithonlyonememoryoperandandonlyoneortwoaddressingmodes;addressingmodecanbeencodedaspartofopcode.另一個(gè)極端是負(fù)載儲(chǔ)藏機(jī)器只有一個(gè)內(nèi)存操作數(shù),只有一個(gè)或兩種尋址模式;尋址模式可以是編碼的操作碼的一局部。Wemustbalanceseveralcompetingforceswhenencodinginstructionset. 沖突的需求Thedesiretohaveasmanyregistersandaddressingmodesaspossible.存放器和尋址模式越多越好Theimpactofthesizeoftheregisterandaddressingmodefieldsonaverageinstructionsizeandhenceontheaverageprogramsize.存放器和尋址模式域的大小對(duì)指令大小，進(jìn)而對(duì)程序大小的影響Adesiretoencodeinstructionsintolengthsthatareeasytohandle.Asaminimum,architectwantsinstructionstobeinmultiplesofbytes,ratherthanarbitrarylength.Manyarchitectsusefixed-lengthinstructiontogainimplementationbenefitswhilesacrificingaveragecodesize.指令大小易于處理指令集格式的選擇Thefirstwecallvariable(變長(zhǎng)),sinceitallowsvirtuallyalladdressingmodestobewithalloperations.isbestwhentherearemanyaddressingmodesandoperations.字長(zhǎng)和執(zhí)行時(shí)間大不一樣。Thesecondwecallfixed(定長(zhǎng)),combinestheoperationandtheaddressingmodeintotheopcode.Oftenhaveonlyasinglesizeforallinstructions;itworksbestwhentherearefewaddressingmodesandoperations.固定長(zhǎng)度編碼方式：它將操作類型和尋址方式組合編碼在格式格外好，他可以有效降低譯碼的簡(jiǎn)單度，提高譯碼力量。Thethirdcalledhybrid(混合),isatrade-offbetweenthesizeofprogramsversuseaseofdecoding.混合型編碼格式：其目的是通過供給肯定類型的指令字長(zhǎng)，期望能夠兼顧降低目標(biāo)代碼長(zhǎng)度和降低譯碼簡(jiǎn)單度兩個(gè)目標(biāo)。OperationintheInstructionSet指令集中的操作Oneruleofthumbacrossisthatthemostwidelyexecutedinstructionsarethesimpleoperationsofaninstructionset.多數(shù)廣泛執(zhí)行的指令是簡(jiǎn)潔操作InstructionsforControlFlow掌握流指令fourdifferenttypesofcontrol-flowchange:四種掌握流轉(zhuǎn)變1.Conditionalbranches 條件轉(zhuǎn)移 2.Jumps跳轉(zhuǎn)3.Procedurecalls 過程調(diào)用 4.Procedurereturns 過程返回Conditionalbranchesclearlydominate 條件轉(zhuǎn)移占確定優(yōu)勢(shì)AddressingModesforControlFlowInstructions 掌握流指令的尋址模式Thedestinationaddressofacontrolflowinstructionmustalwaysbespecified必需規(guī)定目標(biāo)地址procedurereturnismajorexception 過程返回則例外Themostcommonwaytospecifythedestinationistosupplyadisplacementthatisaddedtotheprogramcounter(PC).ControlflowinstructionsofthissortarecalledPC-relative(PC相對(duì))PC相對(duì)是通過位移參加到程序計(jì)數(shù)器中最常見的方法.PC相對(duì)的優(yōu)勢(shì):PC-relativebranchesorjumpsareadvantageousbecausethetargetisoftennearthecurrentinstruction,andspecifyingthepositionrelativetocurrentPCrequiresfewerbits.目標(biāo)通常在四周,需要位數(shù)少.PC-relativeaddressingalsopermitscodetorunindependentlyofwhereitisloaded.Calledpositionindependence(位置獨(dú)立),caneliminatesomeworkwhentheprogramislinkedandisalsousefulinprogramslinkedduringexecution.允許代碼獨(dú)立運(yùn)行,便于連接.Toimplementreturnsandindirectjumpsinwhichthetargetisnotknownatcompiletime,amethodotherthanPC-relativeaddressingisrequire.返回或非直接跳轉(zhuǎn)要實(shí)行另外的尋址方法Here,theremustbeawaytospecifythetargetdynamically,sothatitcanchangeatruntime.動(dòng)態(tài)確定目標(biāo)地址Thisdynamicaddressmaybeassimpleasnamingaregisterthatcontainsthetargetaddress.可將目標(biāo)地址裝在存放器中Knowingthedistributionofthesedisplacementswillhelpinchoosingwhatbranchoffsetstosupportandthuswillaffecttheinstructionlengthandencoding.知道位移大小的分布狀況有助于確定對(duì)轉(zhuǎn)移偏移量的選擇,并影響指令長(zhǎng)度和編碼。Thistellsusthatshortdisplacementfieldsoftensufficeforbranches.小的位移域足夠用于轉(zhuǎn)移ConditionalBranchOptions條件轉(zhuǎn)移的選項(xiàng)Oneofthemostnoticeablepropertiesofbranchesisthatalargenumberofthecomparisonsaresimpleequalityorinequalitytests,andarecomparisonswithzero.多數(shù)的比較是簡(jiǎn)潔的等式和不等式檢測(cè),以及與零比較ProcedureInvocationOptions過程調(diào)用選項(xiàng)Procedurecallsandreturnsincludecontroltransferandpossiblysomestatesaving. 過程調(diào)用和返回包括掌握轉(zhuǎn)移和可能的一些狀態(tài)保存。Callersaving(調(diào)用者保存):thecallingproceduremustsavetheregistersthatitwantspreservedforaccessafterthecall.Calleesaving(被調(diào)用者保存):thecalledproceduremustsavetheregistersitwantstouse.Summary:OperationsintheInstructionSet 總結(jié):指令集中的操作RISCvs.CISC 精簡(jiǎn)指令集計(jì)算機(jī)與簡(jiǎn)單指令集計(jì)算機(jī)RISCvs.CISCTechnology RISCCISC技術(shù)精簡(jiǎn)指令集計(jì)算機(jī)：RISC(reducedinstructionsetcomputer)isamicroprocessorthatisdesignedtoperformasmallernumberoftypesofcomputerinstructionsothatiscanoperateatahigherspeed.指令類型少,運(yùn)行快OneadvantageofRISCisthattheycanexecuteinstructionsveryfastbecausetheinstructionsaresosimple.指令簡(jiǎn)潔,因此運(yùn)行格外快Another,perhapsmoreimportantadvantage,isthatRISCchipsrequirefewertransistors,whichmakesthemcheapertodesignandproduce.需要更少的晶體管,設(shè)計(jì)和制造更廉價(jià)。簡(jiǎn)單指令集計(jì)算機(jī)：conventionalcomputershavebeenreferredtoasCISC’s(ComplexInstructionSetComputers)，傳統(tǒng)計(jì)算機(jī)TheprimarygoalofCISCarchitectureistocompleteataskinasfewlinesofassemblyaspossible.Thisisachievebybuildingprocessorhardwarethatiscapableofunderstandingandexecutingaseriesofoperations. 匯編語(yǔ)言程序量小,這通過硬件來(lái)實(shí)現(xiàn)。CharacteristicofCISCandRISC CISCRISC的特點(diǎn)CISC特點(diǎn)：Extensiveinstructions. 指令多Complexandefficientmachineinstructions.簡(jiǎn)單、高效Microencodingofthemachineinstructions.微指令Extensiveaddressingcapabilitiesformemoryoperations.尋址力量強(qiáng)Relativelyfewregisters. 存放器少RISC特點(diǎn)：Reducedinstructionset.精簡(jiǎn)指令集Lesscomplex,simpleinstructions.指令簡(jiǎn)潔Hardwiredcontrolunitandmachineinstructions.硬掌握單元、機(jī)器指令Fewaddressingschemesformemoryoperands.onlytwo:LOADandSTORE. 一些關(guān)于內(nèi)存操作數(shù)的尋址方案：LOADSTORE.Manysymmetricregisterswhichareorganisedintoaregisterfile. 很多存放器DebatingonRISCandCISC RISCCISC的爭(zhēng)論RISC爭(zhēng)論：proponents:RISCarebothcheaperandfaster,andarethereforethemachinesofthefuture.支持：RISC既廉價(jià)，速度又快，是將來(lái)的機(jī)器。RISCputagreaterburdenonthesoftware.反對(duì)：RISC將更多負(fù)擔(dān)放在軟件上。theargumentisbecomingmootbecauseCISCandRISCimplementationsarebecomingmoreandmorealike. CISCRISC越來(lái)越相像，因此爭(zhēng)論無(wú)意義。RISCDesignFeatures RISC設(shè)計(jì)特征RISC設(shè)計(jì)：reductionoftheinstructionset. 精簡(jiǎn)指令集onecycleexecutiontime. CPI=1instructionpipelining.指令流水線load/storearchitecture.loadstore指令能訪問存儲(chǔ)器,全部其他指令都只與存放器打交道unityofRISCprocessorsandcompilers. 處理器與編譯器聯(lián)合開發(fā)amodifiedregisterconcept. RISC中,對(duì)快速的子程序調(diào)用,ax,bx等方式來(lái)治理,而是以變量窗口的形式存在,能看到某組存放器文件.Theexecutionstructureofaninstructionisthefollowingstepsmustbecarriedout:執(zhí)行一個(gè)指令的構(gòu)造：1.readtheinstructionfrommemory (instructionfetching) 取指令2.decodetheinstruction(decodingphase)譯碼3.wherenecessary,fetchoperand(s)(operandfetchingphase)取操作數(shù)4.executetheinstruction(executionphase)執(zhí)行5.writebacktheresult(write-backphase)寫回LatestdevelopmentsinRISCdesign RISC設(shè)計(jì)的最進(jìn)展Withsomeprocessorsthephasesarecombinedintoonephase.有些階段可合并However,instructionphases can be sub-dividedfurther,leading to a superpipelinedarchitecturewithmanypipelinestages(tenormore). 超流水線,但實(shí)現(xiàn)困難,不太用Anotherpossibilityistheintegrationofmanypipelinesoperatinginparallel.theresultisasuperscalar. 超標(biāo)量，幾乎現(xiàn)代微處理器都是。TheDLXArchitecture DLX體系構(gòu)造DLX是一種多元未飽和型指令集構(gòu)造。DLX強(qiáng)調(diào)：simpleload-storeinstructionsetLOAD/STORE指令集designforpipeliningefficiency,includingfixedinstructionsetencoding.設(shè)計(jì)留意指令流水效率，包括固定的指令集編碼efficiencyascompilertarget高效支持編譯器DLX特點(diǎn)：allDLXinstructionsare32bitslong.DLX32位的0Register0alwayscontainszeroR0，用作存儲(chǔ)源操作數(shù)0Register31isreservedforusebysomeDLXinstructions.R31

專為一些特別指令DLXalsohasa32bitprogramcounterDLX32位的程序計(jì)數(shù)器RegistersforDLX DLX的存放器1.通用存放器：GPRs:R0,R1,…,R31(thoughRegs[R0]=0)2.符點(diǎn)存放器：FPRs:F0(F1),F2(F3),…,F30(F31)3.特別：Specialregisters,e.g.,FPstatusregister〔符點(diǎn)狀態(tài)存放器〕DatatypesforDLX DLX的數(shù)據(jù)類型DLXoperationsworkon32-bitintegersand32-or64-bitFPDLX323264位浮點(diǎn)數(shù)據(jù)進(jìn)展的。Bytesandhalf-wordssupported.支持字節(jié)、半字Remainingbitsofregisterfilledwithzerosorthesignbit8位或16位整型數(shù)據(jù)載入到存放032位通用存放器中的剩余位。AddressingmodesforDLXdatatransfers DLX數(shù)據(jù)傳送的尋址模式DLX供給：存放器尋址、馬上值尋址、偏移尋址、存放器間接尋址四種尋址方式。532個(gè)通用存放器或符點(diǎn)存放器。16位的。DLX的存儲(chǔ)地址承受的是高端字節(jié)表示挨次，存儲(chǔ)器按字節(jié)尋址，其地址寬度為32為。對(duì)通用存放器而言，相應(yīng)的存儲(chǔ)器訪問數(shù)據(jù)大小有字節(jié)〔8位、半字〔16位、字〔32位；對(duì)符點(diǎn)存放器而言，相應(yīng)的存儲(chǔ)器訪問數(shù)據(jù)大小有字2位、雙字4位。DLX的全部存儲(chǔ)器翻跟均需對(duì)齊。DLXInstructionFormat DLX指令格式Allinstructionsare32bitswith6-bitprimaryopcode(soeasytopipelinedecode)DLX326位表示操作碼〔所以利于流水線和解碼〕類型：R-type：R類型，字節(jié)、半字、字的載入、存儲(chǔ)。I-type：I類型，加、減、讀、寫、移動(dòng)。J-type：J類型，跳轉(zhuǎn)、跳轉(zhuǎn)并鏈接、從特別處自陷、返回。Allinstructionsformatsmustspecifyanopcode全部指令格式必需指定一個(gè)操作碼R-type(register)instructionsspecifythreeregistersintheinstruction---twosourceregistersandonedestinationregister.,一個(gè)目的存放器I-type(immediate)instructionsspecifyonesourceregister,onedestinationregister,anda16-bitimmediatevaluethatissign-extendedto32bitsbeforeit’sused.一個(gè)源存放器,一個(gè)目的存放器,32位的馬上數(shù)J-type(jump)instructionsconsistofjusttheopcodeanda26bitoperand,whichisusedtocalculatethedestinationaddress.32位操作數(shù),用于計(jì)算目標(biāo)地址3.Pipeling流水線DLX3.Pipeling流水線WhatisPipelining流水線是什么？根本概念流水段：keyimplementationtechniqueforfastCPUs. 實(shí)現(xiàn)快速CPU的關(guān)鍵技術(shù)multipleinstructionsrunoverlapped. 多指令重疊運(yùn)行Differentstepsarecompletingdifferentpartsofdifferentinstructionsinparallel.不同步驟并行完成不同指令的不同局部流水段：Eachstepiscalled: pipestageor pipesegment過程：Instructions:enter->progress->exit.吞吐量、時(shí)鐘周期：吞吐量：howoftenaninstructionexitsthepipeline.機(jī)器周期：machinecycle：timerequiredbetweenmovinganinstructiononestepdownthepipeline.determinedbythetimerequiredfortheslowestpipestage. 由最慢的流水線段打算isusuallyoneclockcycle(sometimesitistwo,rarelymore). 機(jī)器周期通常是一個(gè)時(shí)鐘周期性能：Goal:balancethelengthofpipelinestages. 目標(biāo)：平衡流水段的長(zhǎng)度指令在為流水作業(yè)機(jī)器上用時(shí)時(shí)間=流水段數(shù)量1.notbeperfectlybalanced 不能完全平衡 2.pipeliningoverhead 流水線開銷改進(jìn)：decreasingCPI(ifmultipleclockcyclesperinstruction). CPIdecreasingtheclockcycletime(onelongclockcycleperinstruction). 降低時(shí)鐘周期ASimpleImplementationofDLX DLX的一種簡(jiǎn)潔實(shí)現(xiàn)DLX5個(gè)步驟：IF,ID,EX,MEM,WBInstructionfetchcycle(IF):取指令周期①SendoutthePC,fetchinstructionfrommemoryintoinstructionregister(IR);取指令到指令存放器②IncrementthePCby4toaddressthenextsequentialinstruction. PC+4指到下一條指令③TheIRholdtheinstructionthatwillbeneededonsubsequentclockcycles; IR中的指令將被執(zhí)行④NPCisusedtoholdthenextsequentialPC. 將下一條指令地址放入臨時(shí)存放器NPCInstructiondecode/registerfetchcycle(ID)指令譯碼/讀存放周期①Decodetheinstruction,readtheregisters. 解碼②TheoutputsofIRarereadinto2temporaryregisters(AandB)foruseinlaterclockcycles.讀出結(jié)果放入兩個(gè)臨時(shí)存放器A、B中。③lower16bitsofIRaresign-extendedandstoredintotemporaryregisterImm,foruseinnextcycle.IR1632Imm中另：指令譯碼/去存放器能并行的緣由：fixed-fielddecoding〔固定域解碼〕Execution/effectiveaddresscycle(EX):執(zhí)行/有效地址計(jì)算周期①M(fèi)emoryreference:存儲(chǔ)器訪問TheALUaddstheoperandstoformtheeffectiveaddressandplacesresultintoregisterALUOutputALU將操作數(shù)相加刑場(chǎng)有效地址，并將結(jié)果放入臨時(shí)存放器ALUoutput中。②Register-RegisterALUinstruction:存放器-ALU指令TheALUperformstheoperationspecifiedbythefunctioncodeonthevalueinAandB.TheresultisplacedinthetemporaryregisterALUOutputALU依據(jù)操作碼指出的操作類型對(duì)臨時(shí)存放器AB中的值進(jìn)展處理，并將結(jié)果送入臨時(shí)存放器ALUoutput中。③Register-ImmediateALUinstruction:存放器-ALU指令TheALUperformstheoperationspecifiedbytheopcodeonthevalueinAandinregisterImm.TheresultisplacedinthetemporaryregisterALUOutput. ALU依據(jù)操作碼指出的操作類型對(duì)臨時(shí)存放器AImm中的值進(jìn)展處理，并將結(jié)果送入臨時(shí)存放器ALUoutput中。④Branch: 分支操作TheALUdoadds:NPC+Imm,tocomputetheaddressofthebranchtarget. 計(jì)算目標(biāo)地址RegisterAischeckedtodeterminewhetherthebranchistaken. 檢測(cè)A以確定是否轉(zhuǎn)移/執(zhí)行可結(jié)合到一個(gè)時(shí)鐘周期內(nèi)的緣由：noinstructionsimultaneouslycalculateadataaddress,calculateaninstructiontargetaddress,andperformanoperationonthedata.沒有指令在計(jì)算數(shù)據(jù)地址、目標(biāo)地址的同時(shí)還對(duì)數(shù)據(jù)進(jìn)展操作。Memoryaccess/branchcompletioncycle(MEM):存儲(chǔ)器訪問/分支完成周期①M(fèi)emoryreference:loadandstore存放器引用Ifisload,datareturnsfrommemoryandisplacedintheLMD(loadmemorydata)re