DigitalLogicCircuits數(shù)字邏輯電路知到智慧樹(shù)期末考試答案題庫(kù)2025年南京理工大學(xué)Witha100kHzclockfrequency,eightbitscanbeseriallyenteredintoashiftregisterin

答案:80usWitha1MHzclockfrequency,eightbitscanbeparallelenteredintoashiftregister

答案:inthepropagationdelaytimeofoneflip-flopWhichoneofthefollowingisanexampleofacounterwithatruncatedmodulus?

答案:Modulus14Whichofthefollowingisavalidstateinan8421BCDcounter?

答案:1000WhentheconfigurablelogicblocksinanFPGAarerelativelysimple,theFPGAarchitectureis

答案:finegrainedWhendataisreadfromRAM,thememorylocationis(

).

答案:unchangedVerilogHDLisa(

)

答案:computerlanguageTwotypesofSPLDsare

答案:PALandGALTwotypesofDACarethebinary-weightedinputandtheR/2Rladder.

答案:對(duì)Twocascadeddecadecountersdividetheclockfrequencyby10.

答案:錯(cuò)Twobroadtypesofdigitalintegratedcircuitsarefixed-functionandprogrammble.

答案:對(duì)Toexpanda2-bitparalleladdertoa4-bitparalleladder,youmust(

).

答案:usetwo2-bitadderswiththecarryoutputofoneconnectedtothecarryinputoftheotherToenterabyteofdataseriallyintoan8-bitshiftregister,theremustbe

答案:eightclockpulsesTocauseaDflip-floptotoggle,connectthe(

).

答案:Toachieveamodulusof100,tendecadecountersarerequired.

答案:錯(cuò)Toachieveamaximummodulusof32,sixteenstagesarerequired.

答案:錯(cuò)Threecascadedmodulus-10countershaveanoverallmodulusof

答案:1000Thereisan“invalid”regionbetweentheinputrangesforlogic0andlogic1

答案:對(duì)ThevaluezrepresentsanunknownlogicvalueinVerilogHDL.

答案:錯(cuò)Thetimeintervalillustratediscalled(

).

答案:tPLHThethroughputofaflashADCismeasuredin

答案:samplespersecondThetermbitmeans(

)

答案:bothanswers(b)and(c)ThestorageelementofaDRAMisa

答案:capacitorThequantizationprocess

答案:convertsthesample-and-holdoutputtobinarycodeTheprocessofconvertingananalogvaluetoacodeiscalledquantization.

答案:對(duì)Theoverflowoccurswhenaddingthefollowing8-bittwo’scomplementnumber:01011101+00110001

答案:對(duì)TheoverflowdoesNOToccurwhenaddingthefollowing8-bittwo’scomplementnumber:10111111+11011111

答案:對(duì)TheoverflowdoesNOToccurwhenaddingthefollowing8-bittwo’scomplementnumber:10111111+11011111

答案:對(duì)TheoutputoftheMealy

machineisthevaluethatispresentimmediatelybeforethe

activeedgeoftheclock.

答案:對(duì)Theoutputofanexclusive-ORis0iftheinputsareopposite.

答案:錯(cuò)TheoutputofaMealymachinedependsonits

答案:inputsTheoutputofaDlatchwillnotchangeif(

).

答案:EnableisnotactiveThenumberofvaluesthatcanbeassignedtoabitare(

)

答案:twoThenumberofcomparatorsrequiredina10-bitflashADCis(

).

答案:1023Thenumber1100inBCDis(

)

答案:invalidThenonrecurringengineering(NRE)costforanASICdesignisnormallylow.

答案:錯(cuò)ThemostcommonADCseenintelecommunicationsbasedonaudiosignalsis

答案:sigma-deltaADCThemodulusofan8-bitJohnsoncounteriseight.

答案:錯(cuò)Themodulusofacounteris

答案:theactualnumberofstatesinitssequenceThemaximummodulusofacounteris,

wherenisthenumberofstages(flip-flops)inthecounter.

答案:錯(cuò)Themaximumcumulativedelayofanasynchronouscountermustbe

答案:lessthantheperiodoftheclockwaveformTheLUT,usedintheLUT-CPLDarchitecture,isbasicallyamemorythatcanbeprogrammedusing

答案:SOPfunctionsThelogicmoduleinanFPGAlogicblockcanbeconfiguredfor

答案:both(a)and(c)TheJohnsoncounterisaspecialtypeofshiftregister.

答案:對(duì)TheIntegralNonlinearityofanADCdefinesthemaximumdeviationoftheADCtransferfunctionfromthebest-fitline.

答案:對(duì)Theinitialstatementexecutesonlyonce,startingfromsimulationtime0,andmaycontinuewithanyoperationsthataredelayedbyagivennumberoftimeunits.

答案:對(duì)Theinitialstatementexecutesonlyonce,startingfrom

simulationtime0,andmaycontinuewithanyoperationsthataredelayedbyagiven

numberoftimeunits.

答案:對(duì)Theinitialcountofamodulus-13binarycounteris

答案:0000Thegroupofbits10110101isseriallyshifted(right-mostbitfirst)intoan8-bitparalleloutputshiftregisterwithaninitialstateof11100100.Aftertwoclockpulses,theregistercontains

答案:01111001Thefractionalbinarynumber0.11hasadecimalvalueof(

)

答案:?Theflip-flopusedinaCPLDmacrocellcanbeprogrammedasa

答案:both(a)and(b)Thefirststepinareadorwriteoperationforarandomaccessmemoryisto(

).

答案:placeavalidaddressontheaddressbusThefinaloutputofthesynthesisphaseofadesignflowisthe

答案:netlistThefactorthatdeterminestheadequacyofaGALforalogicdesignis

答案:both(a)and(b)TheDflip-flopshownwill(

).

答案:toggleonthenextclockpulseThecontinuousassignmentassignOUT=

select?A:B;specifiestheconditionthatOUT=

()

ifselect=

1,elseOUT=

()

ifselect=

0.

答案:A,BTheBooleanexpressionA

+1isequalto(

).

答案:1TheBooleanexpressionA

.

1isequalto(

).

答案:ATheBooleanequationAB+AC=A(B+C)illustrates(

)

答案:thedistributionlawThebitcapacityofamemorythathas512addressesandcanstore8bitsateachaddressis

答案:4096ThebasicelementsofanFPGAare

答案:both(a)and(b)Theassociativelawforadditionisnormallywrittenas(

)

答案:(A+B)+C

=A

+(B+C)TheadvantageofdynamicRAMoverstaticRAMisthat(

).

答案:itissimplerandcheaperTheadvantageofdynamicRAMoverstaticRAMisthat(

).

答案:itissimplerandcheaperThe74138decodercanalsobeusedas(

).

答案:aDEMUXThe2’scomplementof1000is(

)

答案:1000The()ofADCisdeterminedbythenumberofbitsitusestodigitizeaninputsignal.

答案:resolutionThe(

)oftheA/Dconverterdetermineshowclosetheactualdigitaloutputistothetheoreticallyexpecteddigitaloutputforagivenanaloginput.

答案:accuracySynchronouscounterscannotberealizedusingJ-Kflip-flops.

答案:錯(cuò)Successfulapproximationisananalog-to-digitalconversionmethod.

答案:錯(cuò)StaticRAMis(

).

答案:volatileread/writememorySRAM,DRAM,flash,andEEPROMareall

答案:semiconductorstoragedevicesSOPstandardformisusefulforconstructingtruthtablesorforimplementinglogicinPLDs.

答案:對(duì)Shiftregistersconsistofanarrangementofflip-flops.

答案:對(duì)RAMisusedinacomputerto

storetheBIOS(BasicInput/Output

System.

答案:錯(cuò)RAMisusedinacomputertostoretheBIOS(BasicInput/OutputSystem

答案:錯(cuò)Opticalstoragedevicesemploy

答案:lasersOneofthemajorapplicationsofSRAMsisincachememoriesincomputers.

答案:對(duì)Onceprogrammed,PLDlogiccanbechanged.

答案:對(duì)NonvolatileFPGAsaregenerallybasedon

答案:antifusetechnologyMIPSstandsformemoryinstructionspersecond.

答案:錯(cuò)Memoryexpansionisaccomplishedbyaddinganappropriatenumberofmemorychipstotheaddress,data,andcontrolbuses.

答案:對(duì)Memoryexpansion

isaccomplishedbyaddinganappropriatenumberofmemorychipstotheaddress,data,

andcontrolbuses.

答案:對(duì)LogicsimplificationisstillusefulinnowadaysFPGAdesigns.

答案:錯(cuò)InVerilogHDL,thedefinitionsofmodulesareallowedtobenested.

答案:錯(cuò)InVerilogHDL,aninitialbehavioralstatementexecutesonlyonce.

答案:對(duì)InVerilogHDL,~(1010)is(0101),and!(1010)is0.

答案:對(duì)Insynthesis,anetlistwillbegeneratedtodescribethecircuitcompletely.

答案:對(duì)Ingeneral,weneedatmostbitstoexpresstheproductwhenmultiplyingann-bitnumberbyanm-bitnumber.

答案:錯(cuò)InFPGAdesign,thestepthat“maps”thedesignfromthenetlisttofitittoatargetdeviceisknownas"programming".

答案:錯(cuò)InaMoore

model,theoutputsofthesequentialcircuitarenotsynchronizedwiththe

clock.

答案:錯(cuò)Inafunctionalsimulation,theusermustspecifythe

答案:inputwaveformsInacomputer,theBIOSprogramsarestoredinthe

答案:ROMInabinaryweightedDAC,thelowest-valueresistorcorrespondsto

答案:thehighestbinaryweightedinputIfthepresentstateis1000,thenextstateofa4-bitup/downcounterintheDOWNmodeis0111.

答案:對(duì)Ifanhex-to-binarypriorityencoderhasits0,3,6,and14inputsattheactivelevel,theactive-HIGHbinaryoutputis(

).

答案:1110Ifananti-aliasingfilterisnotusedindigitizingasignaltherecoveryprocess(

)

答案:mayincludealiassignalsGenerally,ananalogsignalcanbereconstructedmoreaccuratelywith

答案:eitheranswer(a)or(c)Fortransmission,datafromaUARTissentinsynchronousparallelform.

答案:錯(cuò)Fortransmission,datafromaUARTissentin

synchronousparallelform.

答案:錯(cuò)FortheJ-Kflip-flopshown,thenumberofinputsthatareasynchronousis(

).

答案:2Forthebinarynumber10000,theweightofthecolumnwiththe1is(

)

答案:16Forcounterswithunusedstates,itisnecessarytoensurethatthecircuiteventuallygoesintooneofthevalidstatessothatitcanresumenormaloperation.

答案:對(duì)Fan-outisthenumberofsimilargatesthatagivengatecandrive.

答案:錯(cuò)DSPsaretypicallyprogrammedin

答案:both(a)and(b)Deltamodulationisbasedonthedifferenceoftwosuccessivesamples.

答案:對(duì)Datathatarestoredatagivenaddressinarandom-accessmemory(RAM)arelostwhen

答案:answers(a)and(c)Dataarestoredinarandom-accessmemory(RAM)duringthe

答案:writeoperationDataareinformationonlyinnumeric.

答案:錯(cuò)Considertheinitial

blockinthefollowing:initialbeginA=0;B=0;#10A=1;#20A=0;B=1;EndThenatt=30,Ais

changedto(

)andBto(

).

答案:0,1Comparedtoanalogsystems,digitalsystems(

)

答案:arelesspronetonoiseAssumeyouwanttodecodethebinarynumber0011withanactive-LOWdecoder.Themissinggateshouldbe(

).

答案:aNANDgateAssumetheoutputisinitiallyHIGHonaleadingedgetriggeredJ-Kflipflop.Fortheinputsshown,theoutputwillgofromHIGHtoLOWonwhichclockpulse?

答案:3Assumetheclockfora4-bitbinarycounteris80kHz.Theoutputfrequencyofthefourthstage(Q3)is(

).

答案:5kHzAnop-ampisalinearamplifierwhichhas

答案:twoinputsandoneoutputAnexampleofanunweightedcodeis(

)

答案:GraycodeAnexampleofanalphanumericcodeis(

)

答案:ASCIIAnasynchronous

resetsignalwilloverridetheclockonaFF.

答案:對(duì)Anasynchronouscounterisalsoknownasaripplecounter.

答案:錯(cuò)Ananti-aliasingfiltershouldhave(

)

答案:Ananalogsignalcanbeconvertedtoadigitalsignalusingsampling.

答案:對(duì)AnadvantageofaringcounteroveraJohnsoncounteristhattheringcounter(

).

答案:isself-decodingAnadditionoverflowsiftheaddends’signsarethesamebutthesum’ssignisdifferentfromtheaddends’.

答案:對(duì)AnADCisananalogdatacomponent.

答案:錯(cuò)AnADCisananalogdatacomponent

答案:錯(cuò)Allshiftregistersaredefinedbyspecifiedsequences.

答案:錯(cuò)Aliasingresultsin

答案:undersamplingAliasingisadesiredfactorinsampling.

答案:錯(cuò)AdjacentcellsonaKarnaughmapdifferfromeachotherby

答案:onevariableAddressmultiplexingcanreducethenumberofpinsintheICpackage.

答案:對(duì)Accordingtothesamplingtheorem,thesamplingfrequencyshouldbe

答案:greaterthantwicethehighestsignalfrequencyAtypicalmacrocellconsistsof

答案:gatesandashiftregisterAstatemachineisasequentialcircuithavingalimitednumberofstatesoccurringinaprescribedorder.

答案:對(duì)Ashiftregisterwithfourstagescanstoreamaximumcountoffifteen.

答案:對(duì)Ashiftregistercounterisashiftregisterwiththeserialoutputconnectedbacktotheserialinput.

答案:對(duì)Ashiftregistercannotbeusedtostoredata.

答案:錯(cuò)Ashiftregistercannotbeusedasatimedelaydevice.

答案:錯(cuò)Aserialshiftregisteracceptsonebitatatimeonasingleline.

答案:對(duì)AROMisa

答案:nonvolatilememoryAringcounterusesoneflip-flopforeachstateinitssequence.

答案:對(duì)Aregister’sfunctionsinclude

答案:both(a)and(b)Areconstructionfilter(

).

答案:alloftheaboveAquantityhascontinuousvalueis(

)

答案:ananalogquantityApossiblesequencefora4-bitringcounteris(

).

答案:…1000,0100,0010…APALisalogicdevicewhichis

答案:aone-timeprogrammableANORgatecanbeconsideredasanORgatefollowedbyaninverter.

答案:對(duì)Anonvolatilememoryisonethat(

)

答案:retainsdatawithoutpowerappliedANANDgatecanbeconsideredasanANDgatefollowedbyaNOTgate.

答案:對(duì)AMoorestatemachineconsistsofcombinationallogiccircuitsthatdetermine

答案:both(a)and(b)Amodulus-12countermusthave

答案:4flip-flopsAmemorywith512addresseshas

答案:9addresslinesAmacrocellispartofa

答案:answers(a),(b),and(c)Alogicmodulecanbeprogrammedforthefollowingmodesofoperations:

答案:answers(a),(b),and(c)Ahighersamplingrateismoreaccuratethanalowersamplingrateforagivenanalogsignal.

答案:對(duì)AflashADCdiffersfromasimultaneousADC.

答案:錯(cuò)Adivide‐by‐N-counterisacounterthatgoesthrougharepeated

sequenceofNstates,anditisalsoknownasamodulo‐Ncounter.

答案:對(duì)Adigitalvoltmeterusesa

答案:dual-slopeADCAdigitalsignalprocessingsystemusuallyoperatesin

答案:realtimeAdecadecounterwi