1、Good is good, but better carries it.精益求精，善益求善。SI4730收音機(jī)芯片資料與程序SI4730收音機(jī)芯片資料與程序2010-03-0612:50/*在網(wǎng)上看到關(guān)于這個(gè)SI4730的收音機(jī)芯片的資料比較少，所以現(xiàn)在特發(fā)上來(lái)，共有緣人參考，如有不對(duì)之處，請(qǐng)指出。！晶振：24MHz單片機(jī):at89s52注：轉(zhuǎn)載請(qǐng)注明出處，否則追究法律責(zé)任！日期：2010-03-06版本：v1.0設(shè)計(jì)者：swsSI4730資料下載地址：HYPERLINK/file/f6de4b58f/file/f6de4b58f*/#includereg52.h#includeintrins

2、.htypedefunsignedcharuchar;typedefunsignedintuint;#defineHIGH1#defineLOW0#defineSI4730_HIGH/4730選擇地址定義/#defineSI4730_LOW#defineMax_freq_FM10800/108MHz#defineMin_freq_FM8750/87.5MHz#definemax_freq_AM1701/1701KHz#definemin_freq_AM531#defineFM_RECEIVER0 x20/FM調(diào)諧頻率page.52#defineFM_TRNSMITTER0 x30#define

3、AM_RECEIVER0 x40/AM調(diào)諧頻率#defineTX_TUNE_MEASURE0 x32uintFrequency_fm=875;uintFrequency_am=531;bitMode=0;sbitKEY_UP=P22;/向上搜臺(tái)sbitKEY_DW=P23;/向下搜臺(tái)sbitFM_AM_Choose=P24;/FM與AM選擇bitFM_AM_=0;/*STARTcondition:SCLK:|_SDIO:|_1|2|3STOPcondition:SCLK:_|SDIO:_|1|2|3DATA:SCLK:_|_|_SDIO:_|_|RESET:SENB:_|SDIO:_|RST:

4、_|SCLK:_|1|2|3*/sbitSi4730_Reset=P13;sbitSi4730_SCLK=P12;sbitSi4730_SDIO=P11;/如果SI4730的第六腳（SEN）接高電平那么地址是0 x23,0 x22/如果SI4730的第六腳（SEN）接低電平那么地址是0 xc7,0 xc6/#if0/addressswitch#ifdefSI4730_LOW#defineREAD_ADDR0 x23#defineWRITE_ADDR0 x22#endif#ifdefSI4730_HIGH#defineREAD_ADDR0 xc7#defineWRITE_ADDR0 xc6#en

5、dif#defineSCLK_HIGHSi4730_SCLK=HIGH#defineSCLK_LOWSi4730_SCLK=LOW#defineSDIO_HIGHSi4730_SDIO=HIGH#defineSDIO_LOWSi4730_SDIO=LOW#defineREAD_SDIOSi4730_SDIO/=FMSTART=void_NOP()_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();voidSi4730_Delay(unsignedchark)uchari,j;for(i=150;i0;i-)for(j=k;j0;j-);#define

6、I2C_CLK_Delay()_NOP()voidResetSi47XX_2w()Si4730_Reset=LOW;SCLK_HIGH;Si4730_Delay(100);SDIO_HIGH;Si4730_Delay(250);Si4730_Reset=HIGH;voidSi4730_start()SDIO_HIGH;I2C_CLK_Delay();SCLK_HIGH;I2C_CLK_Delay();SDIO_LOW;I2C_CLK_Delay();SCLK_LOW;voidSi4730_ack()SDIO_LOW;I2C_CLK_Delay();SCLK_HIGH;I2C_CLK_Delay

7、();SCLK_LOW;I2C_CLK_Delay();SDIO_HIGH;voidSi4730_stop()SDIO_LOW;I2C_CLK_Delay();SCLK_HIGH;I2C_CLK_Delay();SDIO_HIGH;I2C_CLK_Delay();SCLK_LOW;voidSi4730_writebyte(ucharwrite_data)uchari;for(i=8;i!=0;i-)/循環(huán)移入8個(gè)位READ_SDIO=(bit)(write_data&0 x80);SCLK_HIGH;I2C_CLK_Delay();SCLK_LOW;/SDA數(shù)據(jù)線(xiàn)上數(shù)據(jù)變化write_data

8、=1;/調(diào)整發(fā)送位voidOperation_Si4730_Write(uchar*data1,ucharnumByte)ucharj;Si4730_start();Si4730_writebyte(WRITE_ADDR);/器件地址0 xc6Si4730_ack();I2C_CLK_Delay();for(j=LOW;j=300mSSi4730_Delay(250);Si4730_Delay(250);Si4730_Delay(120);voidSi4730_Tune(charmod,unsignedshortChannel_Freq)unsignedcharwrite_buf5;write

9、_buf0=mod;write_buf1=0 x00;write_buf2=Channel_Freq8;/寫(xiě)入高字節(jié)write_buf3=Channel_Freq;/寫(xiě)入低字節(jié)write_buf4=0 x00;Operation_Si4730_Write(&(write_buf0),5);voidSearch_FM()/調(diào)用手動(dòng)FM頻率調(diào)整子程序menu=15if(Mode)Frequency_fm+=10;/步進(jìn)+0.1MHzif(Frequency_fmMax_freq_FM)Frequency_fm=Min_freq_FM;elseFrequency_fm-=10;/步進(jìn)-0.1MHzi

10、f(Frequency_fm8;/寫(xiě)入高字節(jié)write_buf3=Channel_Freq;/寫(xiě)入低字節(jié)write_buf4=0 x00;write_buf5=0 x00;Operation_Si4730_Write(&(write_buf0),6);voidSearch_AM()/調(diào)用手動(dòng)FM頻率調(diào)整子程序menu=95if(Mode)Frequency_am+=9;/步進(jìn)+9KHzif(Frequency_ammax_freq_AM)Frequency_am=min_freq_AM;elseFrequency_am-=9;/步進(jìn)-9KHzif(Frequency_ammin_freq_AM

11、)Frequency_am=max_freq_AM;/Si4730_Power_Up(AM_RECEIVER);/向上搜臺(tái)Si4730_Tune_AM(AM_RECEIVER,Frequency_am);/AM收音芯片數(shù)據(jù)刷新一次/=amend=/=mainstart=voidmain()Si4730_Delay(250);Si4730_Power_Up_FM_AM_Choose(FM_RECEIVER);/默認(rèn)選擇fmwhile(1)if(!FM_AM_Choose)Si4730_Delay(100);if(!FM_AM_Choose)FM_AM_=FM_AM_;if(!FM_AM_)Si4730_Power_Up_FM_AM_Choose(FM_RECEIVER);/fm選擇elseif(FM_AM_)Si4730_Power_Up_FM_AM_Choose(AM_RECEIVER);/am選擇if(!FM_AM_)/ResetSi47XX_2w();if(!KEY_UP)Si4730_Delay(100);if(!KEY_UP)Mode=HIGH;/向上搜臺(tái)Search_FM();if(!KEY_DW)Si4730_Delay(100);if(!KEY_DW)Mode=LOW;/向下搜臺(tái)