西安理工大學碩士學位論文摘要參考文獻【1】OstuN.AThresholdSelectionMethodfromGray
LevelHis
tograms[J].IEEETransactionsonSystemManagementandCybemetic,1979,9(1):62-66.【2】PetersonGD.PredictingtheperformanceofSoCverificationtechnologies[C]//VHDLInternationalUsersForumFallWorkshop.Washington,2000:17-24.【3】黃小平,樊曉椏,賈琳,等.“龍騰R2”微處理器流水線的設計與優(yōu)化[J].微電子與計算機,2006,23(2):144-147.【4】MIPS64?ArchitectureForProgrammersVolumeII:TheMIPS64?InstructionSetocumentNumber:MD00087Revision2.50July1,2005【5】SeeMIPSRunDominicSweetman2006.10.31【6】AHARONA,GOODMAND,LEVINGERM,etal.TestprogramgenerationforfunctionalverificationofPowerPCprocessorsinIBM[C]//ProcofDesignAutomationConference.1995:279-285【7】VIKRAML,ELIZABETHMR.Abiasedrandominstrucitongenerationenvironmentforarchitecturalverificationofpipelineprocessors[J].JournalofElectronicTesting:TheoryandApplication,2000,16(122):13-27.【8】.KEAVENEYM;McMAHONA;O'KEEFFENThedevelopofadvancedverificationenvironmentsusingsystemverilog2008【9】DavidA.Patterson,JohnL.Hennessy.ComputerOrganizationandDesign:TheHardware/SoftwareInterface.ThirdEdition.NewYork:MorganKaufmannPublishers,2007.284-454【10】JohnL.Hennessy,D.A.Patterson.ComputerArchitecture:AQuantitativeApproach.FourthEdition.NewYork:MorganKaufmannPublishers,2007.66-185【11】VincentP.Heuring,HarryF.Jordan.ComputerSystemsDesignandArchitecture.SecondEdition.鄒恒明,保蕾蕾譯.北京:電子工業(yè)出版社,2005.74~75【12】Reaz,M.B.I.,Islam,M.S.AsingleclockcycleMIPSRISCprocessordesignusingVHDL.in:IEEEInternationalConferenceonSemiconductorElectronics.Penang:IEEEComputerSociety,2002.199-203【13】Gschwind,M.,Salapura,V.FPGAprototypingofaRISCprocessorcoreforembeddedapplications.IEEETransactionsonVeryLargeScaleIntegration(VLSI)Systems,2001,9(2):241-250【14】RamdasT.,Li-minnAng.FPGAimplementationofanintegerMIPSprocessorinHandel-Canditsapplicationtohumanfacedetection.in:IEEETENCON2004,2004.ChangMai:IEEEComputerSociety,2004(1).36-39【15】Q.Zhang,G.Theodoropoulos.ModelingSAMIPS:ASynthesisableAsynchronousMIPSProcessor.in:ACMSpecialInterestGrouponSimulationandModeling.Washington,DC:IEEEComputerSociety,2004.205【16】GochmanSeta1．TheIntelPentiumMprocessor：Microarchitectureandperformance．IntelTechnologyJournal，2003，(2)：21-36【17】guyenKhang．PreparingapplicationsforIntelCore7”miroarchitecture．Technology@IntelMagazine，2006，1-9【18】XingYuhua,WangRu;Electronic.AnOptimizedDesignofMCUinCPUSoftcoreBasedontheFPGA.in:Proceedingsofthe8thInternationalConferenceonElectronicMeasurementandInstruments.Washington,【19】LuddeJM,RoesnerW,HeilingGM,etal.FunctionalverificationofthePOWER4microprocessorandPOWER4multiprocessorsystems.IBMJournalofResearchandDevelopment,2002,46(1):53?73.【20】WazlowskiME,AdigaNR,etal.VerificationstrategyfortheBlueGene/Lchip.IBMJournalof.ResearchandDevelopment,200549（1/3）(303-318)【21】ClarkeEM,WingJM.Formalmethods:Stateoftheartandfuturedirections.ACMComputingSurveys(CSUR),1996,28(4):636-643【22】ChangYS,LeeSJ,ParkIC,YungKCM.Verificationofamicroprocessorusingrealworldapplications.In:Proc.ofthe36thACM/IEEEConf.onDesignAutomation.NewOrleans,1999.151?184.【23】KantrowitzM,NoackLM.I’mdonesimulating;nowwhat?verificationcoverageanalysisandcorrectnesscheckingoftheDECchip21164alphamicroprocessor.In:Proc.ofthe33rdDesignAutomationConf.LasVegas:ACM,1996.325?340.【25】FineS,ZivA.CoveragedirectedtestgenerationforfunctionalverificationusingBayesiannetworks.In:Proc.ofthe40thConf.onDesignAutomation2003.【26】JanickBergeron&EduardCerny&AlanHunter&AndrewNightingale《VerificationMethodologyManualforSystemVerilog》Springers2006Synopsys,IncandARMLimited【27】Accellera《SystemVerilog3.1aLanguageReferenceManual》【28】anickBergeron.WritingTestbenchesusingSystemVerilog.Springer,2006.【29】SystemVerilog3.1aLanguageReferenceManual.Accellera′sExtensions