ZHCS298C–JUNE2011–REVISEDDECEMBER特 說 VIN：1.2V至6.0 VBIAS：2.9V至6.0 與任何電容值：≥2.2μF的電容一起工作保持穩(wěn) ±1%初始精 的電壓。TPS740xx提供低至0.9V的可調(diào)輸入電壓最大壓差電壓(VIN–可調(diào)輸出電壓：低至0

S-PAK?封裝。結(jié)溫溫度范圍：–40°CPC

VDOVDO(VINVOUT)0

IOUTDropout

TypicalApplicationCircuitPleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexasInstrumentssemiconductorproductsanddierstheretoappearsattheendofthisdatasheet.JrS-PAKisatrademarkofTexasInstrumentsCopyright?2011,TexasInstrumentsAllothertrademarksareCopyright?2011,TexasInstrumentsPRODUCTIONDATAinformationiscurrentasofpublicationdate.ProductsconformtospecificationsperthetermsoftheInstrumentsstandardwarranty.Productionprocessingdoes EnglishDataSheet:necessarilyincludetestingofallThisintegratedcircuitcanbedamagedbyESD.TexasInstruments mendsthatallintegratedcircuitsbehandledwithappropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage.ESDdamagecanrangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmaybemoresusceptibletodamagebecauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications.ORDERINGTPS740xxyyyXXisnominaloutputvoltage(forexample,12=1.2V,15=1.5V,01=YYYispackageZispackageForthemostcurrentpackageandorderinginformation,seethePackageOptionAddendumattheendofthis,orvisitthedeviceproductfolderatFixedoutputvoltagesof1.2Visavailable;minimumordertiesmayapply.ContactfactoryfordetailsandForfixed0.9-Voperation,tieFBto UMOver -airtemperaturerange(unlessotherwise IN, VEN,FB, VBIAS+VInternallyAElectrostaticdischargeHumanbodymodel(HBM,JESD22-2Chargeddevicemodel(CDM,JESD22-VStressesbeyondthoselistedunderAbsoluteumRatingsmaycausepermanentdamagetothedevice.Thesearestressratingsonly,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedisnotimplied.Exposureto um-ratedconditionsforextendedperiodsmayaffectdevicereliability.The umratingisVBIAS+0.3Vor+6.0V,whicheverisESDtestingisperformedaccordingtotherespectiveJESD22JEDECTHERMALTHERMALDGK(4pin85Junction-to-ambientthermalJunction-to-case(top)thermalJunction-to-boardthermalJunction-to-topcharacterizationJunction-to-boardcharacterizationJunction-to-case(bottom)thermalFormoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport,ForthermalestimatesofthisdevicebasedonPCBcopperarea,seetheTIPCBThermalThermaldatafortheDGKandDPTpackagesarederivedbythermalsimulationsbasedonJEDEC-standardmethodologyasspecifiedintheJESD51series.Thefollowingassumptionsareusedinthesimulations:DPTonly,theexposedpadisconnectedtothePCBgroundlayerthrougha8×8thermalvia ii.DGK:Thetopcopperlayerhasadedicatedpatternof5%coppercoverageandthebottomcopperlayerhasanotherdecicatedpatternof20%coppercoverage.ThesedataweregeneratedwithonlyasingledeviceatthecenterofaJEDEChigh-K(2s2p)boardwith3in×3incopperThejunction-to-ambientthermalundernaturalconvectionisobtainedinasimulationonaJEDEC-standard,high-Kboard,asspecifiedinJESD51-7,inanenvironmentdescrbedinJESD51-2a.Thejunction-to-case(top)thermalisobtainedbysimulatingacoldtetestonthetopofthepackage.NospecificJEDEC-standardtestexists,butaclosedescriptioncanbefoundintheANSISEMIstandardG30-88.Thejunction-to-boardthermalisobtainedbysimulatinginanenvironmentwitharingcoldtefixturetocontrolthePCBtemperature,asdescribedinJESD51-8.Thejunction-to-topcharacterizationparameter,ψJT,estimatesthejunctiontemperatureofadeviceinarealsystemandisextractedfromthesimulationdatatoobtainθJAusingaproceduredescribedinJESD51-2a(sections6and7).Thejunction-to-boardcharacterizationparameter,ψJB,estimatesthejunctiontemperatureofadeviceinarealsystemandisextractedfromthesimulationdatatoobtainθJAusingaproceduredescribedinJESD51-2a(sections6and7).Thejunction-to-case(bottom)thermalisobtainedbysimulatingacoldtetestontheexposed(power)pad.NospecificJEDECstandardtestexists,butaclosedescriptioncanbefoundintheANSISEMIstandardG30-88.ELECTRICALOveroperatingtemperaturerange(TJ=–40°Cto+125°C),VBIAS=VOUT+2.0V,VN=VOUT+1V,COUT=10μF,followingmendedResistorValues,andVEN=1.1V,unlessotherwisenoted.TypicalvaluesareatTJ=+25°C.TPS74001(adjustableoutputvoltage)istestedatVOUT=0.9TESTInputvoltageVBiaspinvoltageVTJ=1%TJ=–40°Cto2%LineVN=VOUT+1Vto6.0LoadILOAD=0mAto1.5%VNdropoutILOAD=1.5VBIASdropoutILOAD=1.5A,VN=VGroundpinILOAD=1.523Fixedoutputversiononly.VEN≤0.4V,TJ=–40°Cto+85°C,VOUT=0V15BiaspinILOAD=1.52CurrentVOUT=80%×VOUTAVEN,EnableinputhighVVEN,EnableinputlowRLOAD=1kΩto0VEnablepinVEN=1.51Shutdown,temperatureReset,temperatureReferenceVAdjustableoutputvoltagedevices:resistortoleranceisnottakenintoWithafixedoutputdevice,thistestconditionisILOAD=50mAto1.5DropoutisdefinedasthevoltagefromtheinputvoltagetoVOUTwhenVOUTis3%belowIGND(MAX)=3mAincludestheum2mAofFUNCTIONALBLOCKAdjustableOutputVoltage Figure

FigurePINMSOP8(TOP

JrSPAK12341234518273645BNTable1.TERMINALBN11Enablepin;fixedoutputvoltageversiononly.Drivingthispinhighenablestheregulator;drivingthispinlowputstheregulatorintoshutdownmode.Thispinmustnotbeleftunconnected.11Feedbackpin;adjustableoutputvoltageversiononly.Thefeedbackconnectiontothecentertapofanexternalresistordividernetworkthatsetstheoutputvoltage.Thispinmustnotbeleftfloating.22Biasinputvoltageforerroramplifier,reference,andinternalcontrol34Inputtothe45Regulatedoutputvoltage.Asmallcapacitor(totaltypicalcapacitance≥2.2μF,ceramic)isneededfromthispintogroundtoassurestability.3InternallyconnectedtoTYPICALAtTJ=+25°C,VIN=2.5V,VBIAS=5.0V,VOUT(target)=1.5V,VEN=VBIAS,CIN=2.2μF,CBIAS=2.2μF,andCOUT=10unlessotherwisePOWER-SUPPLYRIPPLEREJECTION (INPUTSUPPLY) (BIASSUPPLY)VBIAS=VBIAS=3.3VVIN=1.8VVOUT=1.0VIOUT=1.5ACOUT=2.2F PSRRPSRRPSRRPSRR 0 1 10 100 1

0 1 10 100 1Frequency FrequencyFigure FigureDROPOUT DROPOUT(INPUT (BIASVIN=2.5VVIN=2.5VVOUT=1.5DropoutDropoutVoltageDropoutVoltageDropoutVoltage1 0 100012001400OutputCurrentFigure

0

100012001400OutputCurrentFigureDropoutDropoutVoltage0

DROPOUTVOLTAGEvsTEMPERATURE (INPUTSUPPLY) (BIASSUPPLY)VBIAS=VBIAS=5VIOUT=1.5AVOUT=1.5VIN=2.5VIOUT=1.5AVOUT=1.5DropoutDropoutVoltage10402510 203550658095110 402510 203550658095110Temperature TemperatureFigure FigureTYPICALCHARACTERISTICS(AtTJ=+25°C,VIN=2.5V,VBIAS=5.0V,VOUT(target)=1.5V,VEN=VBIAS,CN=2.2μF,CBIAS=2.2μF,andCOUT=10unlessotherwiseDROPOUTCHARACTERISTICS (INPUTVOLTAGE) (BIASVOLTAGE)OutputOutputVoltage1

VINVIN=2.5VVOUT=1.5VIOUT=10 IOUT=1.5AOutputOutputVoltage1VBIASVBIAS=5VVOUT=1.5VIOUT=10 IOUT=1.5A

0 InputVoltage BiasVoltageFigure FigureOutputOutputVoltage

LOAD UMBIASCURRENTvsBIASVOLTAGEVBIASVBIAS=5VVIN=2.5ReferenceDeviceVFB=0VIOUT=1.5AVIN=2.5BiasBiasCurrent

1000OutputCurrentFigure

BiasVoltageFigureUMBIASCURRENTvs BIASCURRENTvsVIN=2.5VVIN=2.5VVOUT=1.5VVBIAS=5IOUT=10mAIOUT=100mAIOUT=750IOUT=1500BiasCurrentBiasCurrentBiasCurrent 0402510 203550658095110TemperatureFigure

50402510 203550658095110TemperatureFigure(1)ThisdevicedoesnotshowlargebiascurrentatanyTYPICALCHARACTERISTICSTYPICALCHARACTERISTICS)AtTJ=+25°C,VIN=2.5V,VBIAS=5.0V,VOUT(target)=1.5V,VEN=VBIAS,CN=2.2μF,CBIAS=2.2μF,andCOUT=10unlessotherwiseBIASCURRENTvsOUTPUT GROUNDCURRENTvsBIASIOUT=0mAIOUT=0mAVIN=2.5VVOUT=1.5BiasCurrentGroundCurrentVBIAS=5VIN=2.5VVOUT=1.5 420 1000 OutputCurrent BiasVoltageFigure FigureGroundGroundCurrent8642

BIASCURRENTvsBIAS BIASCURRENTvsBIASIOUTIOUT=100mAVIN=2.5VVOUT=1.5VIOUT=750mAVIN=2.5VVOUT=1.5VGroundGroundCurrent0

BiasVoltage BiasVoltageFigure FigureGroundCurrentBIASCURRENTvsBIAS BIASCURRENTvsGroundCurrentIOUT=100VBIAS=5VVOUT=1.5 BiasVoltage InputVoltageFigure FigureBIASCURRENTvsINPUT REFERENCEVOLTAGEvsINPUTVBIAS=VBIAS=5BiasBiasCurrent

ReferenceReferenceVoltage InputVoltageFigure

InputVoltageFigureREFERENCEVOLTAGEvsBIAS OUTPUTVOLTAGEvsVBIAS=VBIAS=5VVIN=2.5ReferenceReferenceVoltage

VIN=2.5

OutputOutputVoltage 402510 203550658095110BiasVoltage TemperatureFigure Figure4Short-CircuitShort-CircuitCurrent21

SHORT-CIRCUITCURRENTvs ENABLETHRESHOLDvsBIASVINVIN=2.5VBIAS=5VVIN=2.5VVOUT=0EnableEnableThreshold10402510 203550658095110

0 Temperature BiasVoltageFigure FigureEnableEnableThreshold10

ENABLETHRESHOLDvs LOADTRANSIENTVBIASVBIAS=5VVIN=2.5VBIAS=3.3VVIN=1.8VVOUT=1.0VCOUT=2.2FIOUT=1.5IOUT=50402510 203550658095110 Time(10OutputCurrentOutput(1OutputCurrentOutput(1(100Figure FigureVIN=1.8VVOUT=1.0VCOUT=2.2FCeramicVIN=1.8VVOUT=1.0VCOUT=2.2FCeramicIOUT=1.5AVBIAS=5.5VBIAS=3.3VBIAS=3.3VVOUT=1.0COUT=2.2FCeramicIOUT=1.5AVIN=5.5VIN=1.8OutputVoltage(20mV/div)OutputVoltage(20mV/div)BiasVoltage(2V/div)nputVoltage(2V/div)Time(500BiasVoltage(2V/div)nputVoltage(2V/div)Figure FigureAPPLICATIONTheTPS740xxbelongstoafamilyoflowdropout(LDO)regulators.Theseregulatorsusealow-currentbiasinputtopowerallinternalcontrolcircuitry,allowingtheNMOS-passtransistortoregulateverylowinputandoutputvoltages.TheuseofanNMOS-passFEToffersseveralcriticaladvantagesformanyapplications.UnlikeaPMOStopologydevice,theoutputcapacitorhaslittleeffectonloopstability.ThisarchitectureallowstheTPS740xxtobestablewithanycapacitortypeof2.2μForgreater.TransientresponseisalsosuperiortoPMOStopologies,particularlyforlowVINapplications.Withthefixedoutputvoltageversion,anenable(EN)pinwithhysteresisanddeglitchallowsslow-ramsignalstobeusedforsequencingthedevice.ThelowVINandVOUTcapabilityisidealforinexpensive,easy-to-design,andefficientlinearregulationbetweenthemultiplesupplyvoltagesoftenpresentinprocessor-intensivesystems.Figure31illustratesthetypicalapplicationcircuitfortheTPS74001adjustableoutput Figure31.TypicalApplicationCircuitfortheTPS74001R1andR2canbecalculatedforanyoutputvoltageusingtheformulashowninFigure31.Table2listssampleresistorvaluesofcommonoutputvoltages.Inordertoachieve umaccuracyspecifications,R2mendedtobelowerthan4.99Figure32illustratesthetypicalapplicationcircuitfortheTPS740xxfixedoutput Figure32.TypicalApplicationCircuitfortheTPS740xx(FixedVoltageTable2.Standard1%ResistorValuesforProgrammingtheOutputR1R2VOUTINPUT,OUTPUT,ANDBIASCAPACITORThedeviceisdesignedtobestableforallavailabletypesandvaluesofoutputcapacitorsgreaterthanorequalto2.2μF.Thedeviceisalsostablewithmultiplecapacitorsinparallel,whichcanbeofanytypeorvalue.ThecapacitancerequiredontheINandBIASpinsstronglydependsontheinputsupplysourceimpedance.Tocounctanyinductanceintheinput,theminimum mendedcapacitorforVINandVBIASis1μF.IfVINandVBIASareconnectedtothesamesupply,the mendedminimumcapacitorforVBIASis4.7μF.Good-quality,low-ESRcapacitorsshouldbeusedontheinput;ceramicX5RandX7Rcapacitorsarepreferred.Thesecapacitorsshouldbecedasclosetothepinsaspossibleforoptimumperformance.TRANSIENTTheTPS740xxisdesignedtohaveexcellenttransientresponseformostapplicationswithasmallamountofoutputcapacitance.Insomecases,thetransientresponsemaybelimitedbythetransientresponseoftheinputsupply.Thislimitationisespeciallytrueinapplicationswherethedifferencebetweentheinputandoutputislessthan300mV.Inthesecases,addingadditionalinputcapacitanceimprovesthetransientresponsemuchmorethansimplyaddingadditionaloutputcapacitance.Withasolidinputsupply,addingadditionaloutputcapacitancereducesundershootandovershootduringatransientevent;refertotheTypicalCharacteristicssection.BecausetheTPS740xxisstablewithoutputcapacitorsaslowas2.2μF,manyapplicationsmaythenneedverylittlecapacitanceattheLDOoutput.Fortheseapplications,localbypasscapacitanceforthepowereddevicemaybesufficienttomeetthetransientrequirementsoftheapplication.Thisdesignreducesthetotalsolutioncostbyavoidingtheneedtouseexpensive,high-valuecapacitorsattheLDOoutput.DROPOUTTheTPS740xxoffersverylowdropoutperformance,makingitwell-suitedforhigh-current,lowVIN/lowVOUTapplications.ThelowdropoutoftheTPS740xxallowsthedevicetobeusedinceofadc/dcconverterandstillachievegoodefficiency.Thisperformanceprovidesdesignerswiththepowerarchitecturefortheapplicationtoachievethesmallest,simplest,andlowestcostsolution.VBIAS=5V5%VIN=1.8VVOUT=1.5VIOUT=1.5AVBIAS=5V5%VIN=1.8VVOUT=1.5VIOUT=1.5AFigure33.TypicalApplicationoftheTPS74001UsinganAuxiliaryBiasThesecondspecification(showninFigure34)isreferredtoasVBIASDropoutandappliestoapplicationswhereINandBIASaretiedtogether.Thisoptionallowsthedevicetobeusedinapplicationswhereanauxiliarybiasvoltageisnotavailableorlowdropoutisnotrequired.DropoutislimitedbyBIASintheseapplicationsbecauseVBIASprovidesthegatedrivetothepassFET;therefore,VBIASmustbe2.0VaboveVOUT.Becauseofthisusage,whenINandBIASaretiedtogethertheyeasilyconsumelargeamountsofpower.DonottoexceedthepowerratingoftheICpackage.VIN=3.3V5VVOUT=1.5VIOUT=Efficiency=VFigure34.TypicalApplicationoftheTPS74001WithoutanAuxiliaryBiasSEQUENCINGVIN,VBIAS,andVENcanbesequencedinanyorderwithoutcausingdamagetotheNOTE:WhenVBIASandVENarepresentandVINisnotd,thisdeviceoutputsapproximay50μAofcurrentfromOUT.Althoughthisconditiondoesnotcauseanydamagetothedevice,theoutputcurrentmaychargeuptheOUTnodeiftotalbetweenOUTandGND(includingexternalfeedbackresistors)isgreaterthan10k?.ENABLE/SHUTDOWN(FixedVoltageVersionTheenable(EN)pinisactivehighandiscompatiblewithstandarddigitalsignalinglevels.WhenVENisbelow0.4V,itturnstheregulatoroff;whenVENisabove1.1V,itturnstheregulatoron.Unlikemanyregulators,theenablecircuitryhashysteresisanddeglitchingforusewithrelativelyslowramogsignals.ThisconfigurationallowstheTPS740xxtobeenabledbyconnectingtheoutputofanothersupplytotheENpin.Theenablecircuitrytypicallyhas50mVofhysteresisandadeglitchcircuittohelpavoidon/offcyclingasaresultofsmallglitchesintheVENsignal.Theenablethresholdistypically0.8Vandvarieswithtemperatureandprocessvariations.Temperaturevariationisapproximay–1mV/°C;processvariationaccountsformostoftherestofthevariationtothe0.4Vand1.1Vlimits.Ifpreciseturn-ontimingisrequired,afastrise-timesignalmustbeusedtoenabletheIfnotused,ENcanbeconnectedtoeitherINorBIAS.IfENisconnectedtoIN,itshouldbeconnectedascloseaspossibletothelargestcapacitanceontheinputtopreventvoltagedroopsonthatlinefromtriggeringtheenablecircuit.INTERNALCURRENTTheTPS740xxfeaturesacurrentlimitthatisflatovertemperatureandsupplyvoltage.Thecurrentlimitrespondsinapproximay10μstoreducethecurrentduringashort-circuitfault.TheinternalcurrentlimitprotectioncircuitryoftheTPS740xxisdesignedtoprotectagainstoverloadconditions.Itisnotintendedtoallowoperationabovetheratedcurrentofthedevice.ContinuouslyrunningtheTPS740xxabovetheratedcurrentdegradesdevicereliability.THERMALThermalprotectiondisablestheoutputwhenthejunctiontemperaturerisestoapproximay+160°C,allowingthedevicetocool.Whenthejunctiontemperaturecoolstoapproximay+140°C,theoutputcircuitryisenabled.Dependingonpowerdissipation,thermal,andambienttemperaturethethermalprotectioncircuitmaycycleonandoff.Thiscyclinglimitsthedissipationoftheregulator,protectingitfromdamageasaresultofActivationofthethermalprotectioncircuitindicatesexcessivepowerdissipationorinadequateheatsinking.Forreliableoperation,junctiontemperatureshouldbelimitedto+125°Cum.Toestimatethemarginofsafetyinacompletedesign(includingheatsink),increasetheambienttemperatureuntilthermalprotectionistriggered;useworst-caseloadsandsignalconditions.Forgoodreliability,thermalprotectionshouldtriggeratleast+40°Cabovethe umexpectedambientconditionoftheapplication.Thisconditionproducesaworst-casejunctiontemperatureof+125°Catthehighestexpectedambienttemperatureandworst-caseload.TheinternalprotectioncircuitryoftheTPS740xxisdesignedtoprotectagainstoverloadconditions.Itisnotintendedtoreceproperheatsinking.ContinuouslyrunningtheTPS740xxintothermalshutdowndegradesdevicereliability. MENDATIONSANDPOWERAnoptimallayoutcangreatlyimprovetransientperformance,PSRR,andnoise.Tominimizethevoltagedropontheinputofthedeviceduringloadtransients,thecapacitanceonINandBIASshouldbeconnectedascloseaspossibletothedevice.Thiscapacitancealsominimizestheeffectsofparasiticinductanceand oftheinputsourceandcan,therefore,improvestability.Toachieveoptimaltransientperformanceandaccuracy,thetopsideofR1inFigure31shouldbeconnectedascloseaspossibletotheload.IfBIASisconnectedtoIN,itismendedtoconnectBIASasclosetothesensepointoftheinputsupplyaspossible.ThisconnectionminimizesthevoltagedroponBIASduringtransientconditionsandcanimprovetheturn-onKnowingthedevicepowerdissipationandpropersizingofthethermalnethatisconnectedtothethermalpadiscriticaltoavoidingthermalshutdownandensuringreliableoperation.PowerdissipationofthedevicedependsoninputvoltageandloadconditionsandcanbecalculatedusingEquation1:PD=(VIN–VOUT)× Powerdissipationcanbeminimizedandgreaterefficiencycanbeachievedbyusingthelowestpossibleinputvoltagenecessarytoachievetherequiredoutputvoltageregulation.OntheDGK(MSOP-8)package,theprimaryconductionpathforheatisthroughfourGNDpins(rightsideoftheIC)totheprintedcircuitboard(PCB).OntheDPT(JrS-PAK)package,theprimaryconductionpathforheatisthroughthetabtothePCB.Thistabshouldbeconnectedtoground.Onbothpackages,groundpatternonPCBshouldhaveanappropriateamountofcopperPCBareatoensurethedevicedoesnotoverheat.The junction-to-ambientthermal dependsonthe umambienttemperature, umdevicejunctiontemperature,andpowerdissipationofthedeviceandcanbecalculatedusingEquation2:

=(+125C REVISIONNOTE:PagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentChangesfromRevisionB(November2011)toRevision Changed輸入電源描述位于描述部 ChangedVOUTparametertestconditionsinElectricalCharacteristics Addedfootnote2toElectricalCharacteristics ChangedVEN,HIparameterumspecificationinElectricalCharacteristics ChangesfromRevisionA(June2011)toRevision ChangedVoltageIN,BIASparameterumspecificationinAbsoluteumRatings ChangedVINandVBIASparameterumspecificationsinElectricalCharacteristics PACKAGEOPTIONPACKAGEOPTIONPACKAGINGOrderablePackageEcoMSLPeakOpTempTop-Side8&noSb/Br)CU-40to8&noSb/Br)CU-40to5&noSb/Br)CU-40to5&noSb/Br)CU-40to8&noSb/Br)CU-40to8&noSb/Br)CU-40to(1)ThemarketingstatusvaluesaredefinedasACTIVE:Product mendedfornewLIFEBUY:TIhasannouncedthatthedevicewillbedis,andalifetime-buyperiodisin mendedfornewdesigns.Deviceisinproductiontosupportexistingcustomers,butTIdoes mendusingthispartinanewPREVIEW:Devicehasbeenannouncedbutisnotinproduction.SamplesmayormaynotbeOBSOLETE:TIhasdistheproductionofthe(2)Econ-Thennedeco-friendlyclassification:Pb-(RoHS),Pb-(RoHSExempt),orGreen(RoHS&noSb/Br)-pleasecheck informationandadditionalproductcontentdetails.TBD:ThePb-/Green nhasnotbeenPb-(RoHS):TI'sterms"Lead- "or"Pb-"meansemiconductorproductsthatarecompatiblewiththecurrentRoHSrequirementsforall6substances,includingtherequirementthatleadnotexceed0.1%byweightinhomogeneousmaterials.Wheredesignedtobesolderedathightemperatures,TIPb-productsaresuitableforuseinspecifiedlead-processes.Pb-(RoHSExempt):ThiscomponenthasaRoHSexemptionforeither1)lead-basedflip-chipsolderbum