AT89S52單機應(yīng)用中英文翻譯專業(yè)名稱：電氣工程及其自動化年級班級：學(xué)生姓名：指導(dǎo)老師：河南理工學(xué)電氣學(xué)院二一二六九

MCUApplicationsFunctionThea8-bitmicrocontrollerwith8KbytesofsystemprogrammableFlashmemory.ThedeviceismanufacturedusingAtmel’snonvolatilememoryandcompatiblewithindus-try-standardsetTheFlashprogramtobebyconventionalnonvolatilepro-grammer.Byversatile8-bitwithin-systemonmonolithictheAtmelapowerfulmicrocontrollerwhichprovidesahighly-flexiblesolutiontomanyembeddedAT89S52providesfollowing8Kbytesof256bytesI/OWatchdogtimer,datapointers,16-bittimer/counters,asix-vectorfullport,on-chipclockcircuitry.Inaddition,withstaticlogicforoperationdowntosoftwaremodes.IdleModetheCPUallowingthetimer/counters,serialport,systemThePower-downmodesavesRAMcon-tentsbuttheoscillator,allotherchipuntilthehardwareDescription：SupplyGND：Ground.Port：Port0anopenbidirectionalI/Oport.AsancanWhen1swrittentocanbeusedashigh-impedance0canbeconfiguredtobemultiplexedbusduringexternalprogramdatamode,hasinternalpull-ups.Port0receivescodebytesFlashandoutputsthecodedur-ingprogramverification.Externalrequiredduringprogramverification.PortPort1isbidirectionalI/Owithinternalpull-ups.1output1

cansink/sourcefourWhen1swritten1pins,arepulledbythepull-upscanbeusedinputs.AsPortthatarebeingpulledlowwillsourcecurrent(IIL)ofinternalInP1.1canbeconfiguredtobeinputtriggerinput(P1.1/T2EX),infollow-ingtable1.Port1alsoduringandverification.secondfunctionofP1PortPin

countinputto2),clock-outT2EX(Timer/Counter2triggeranddirectioncontrol)MOSIforIn-SystemProgramming)MISOforIn-SystemProgramming)forProgramming)PortPort2isbidirectionalI/Owithinternalpull-ups.2outputcansink/sourcefourWhen1swritten2pins,arepulledbythepull-upscanbeusedinputs.AsPortthatarebeingpulledlowwillsourcecurrent(IIL)theinternalpull-ups.emitshigh-orderduringfetchesfromprogramdur-ingaccessestoexternaldatathatuse16-bitaddresses(MOVXDPTR).In2stronginternalemitting1s.accessestodatathatuse8-bit(MOVXRI),2emitsoftheP2FunctionRegister.2alsoreceivesthehigh-orderaddressduringprogram-mingandverification.PortPort3isbidirectionalI/Owithinternalpull-ups.3outputcansink/sourcefourWhen1swritten3pins,arepulledbythepull-upscanbeusedinputs.Aspinsthatare2

beingpulledlowwillsourcecurrent(IIL)thepull-ups.3receivessomeforverification.3alsoservestheofofasshownfol-lowing2.secondfunctionofP3PortPin

RXDinputport)INT1(timer0input)(timer1input)WRmemorywrite

memoryreadstrobe)RSTAhighonpinfortwomachinetheoscillatorthedevice.for98oscillatorperiodsafterthetimesout.TheDISRTObitSFRcanbetodisablethisInofbitHIGHoutisALE/：LatchEnable(ALE)isanforlatchingthelowbyteofduringtoexternalThispinisprograminput(PROG)duringprogramming.Inoperation,ALEemittedconstantrateoftheoscillatorfrequencyandmaybeforexternaltimingorpurposes.Note,however,ALEpulseisskippeddur-ingeachaccesstoexternaldataIfdesired,ALEcandisabledbybit0SFRWiththebitALEisactiveduringMOVXMOVCthepulledhigh.SettingALE-disablebitnoifmicrocontrollerinmode.Enable

)readtoexternalprogramWhentheAT89S52executingcodefromprogrammemory,activatedtwiceeachmachinecycle,exceptthatPSENduringeach3

accesstoexter-nalEA/VPP：ExternalAccessEAmustbestrappedGNDintothetocodefromprogram0000HupFFFFH.Note,thatifbit1isprogrammed,EAwillbeinternallyEAshouldbestrappedforprogramThispinalsoreceives12-voltprogramming(VPP)duringFlash：theinvertinginputinternalclockoperatingcircuit.：fromtheinvertingMemoryIfEAGND,allprogramfetchesaretoifEAVCC,fetchestoaddressesthrough1FFFHtofetchestoaddresses2000HthroughtoexternalDataThe256bytesofThe128aparalleladdressspaceFunctionRegisters.Thismeansthattheupper128byteshavethesameaddressesthespacebutarefromSFRWhenaninternallocationabove7FH,addressusedthewhethertheCPUaccessesupperbytesthewhichdirectaddressingtheForexample,thefollowingdirectaddressinginstructionaccessesSFRatlocation(whichisP2).0A0H,thatindirectaddressingtheupper128ofForthefollowingindirectaddressinginstruction,whereaccessesthedata0A0H,ratherP2(whoseis0A0H).MOV#data.thatstackoperationsexamplesofindirectaddressing,soupper128ofdataareavailable4

WatchdogTimerTheWDTintendedasarecoverymethodinwheretheCPUmaybetosoftwareWDTof14-bittheWatchdogTimerReset(WDTRST)TheWDTdefaultedtodisablefromexitingreset.TotheWDT,userwrite0E1HinsequencetheWDTRSTregisterlocation0A6H).theWDTenabled,itwillmachinecycletheoscillatorrunning.WDTtimeoutperiodisontheexternalclockfrequency.nowaytodisableWDTthroughreset(eitherhardwareWDToverflowreset).Whenover-flows,itwillanoutputRESETHIGHpulseatRSTInPower-downtheoscillatorWDTalsoWhileinPower-downuserdoesnottotheWDT.ThereofexitingPower-downmode:byhardwareresetorvialevel-activatedwhichenabledpriortoPower-downmode.Power-downisexitedwithhardwaretheWDTshouldoccuritnormallywhenevertheAT89S52ExitingPower-downaninterruptissignificantlydifferent.heldlowlongfortheoscillatorstabilize.WheninterruptisbroughttheWDTfromdevicewhiletheinterruptpinheldlow,WDTisnotuntilpulledItisthattheWDTberesettheforusedtoexitPower-downmode.thatWDTdoesnotoverflowwithinofexitingitistotheWDTjustPower-downgoingintothemode,WDIDLEbitinAUXRistodeterminewhetherthetocountifenabled.WDTcountingIDLEbit=0)thestate.theWDTfrominIDLEmode,usershouldalwaysuptimerthatwillexitserviceWDT,andreenterIDLEmode.WDIDLEbitWDTwillstoptoinIDLEthecountfrom5

Timer010andTimer1theAT89S52operatethewayas0andTimer1theAT89C51andAT89C52.fuinformationonthetimers’operation,pleaseclickonbelow:Timer22isaTimer/CountercantimeroranTheofisbybitC/T2inSFRTimerhasoperatingmodes:capture,orcounting),andrategenerator.ThemodesarebybitsT2CON,asshownin2consiststwo8-bitregisters,TH2TL2.InTL2registerisincrementedeverymachinecycle.Sincemachineconsists12countrateofoscil-latorTable3Timer2OperatingModesRCLK+TCLK001X

/RL201XX

TR21110

MODE16-bitAuto-reload16-bitBaudRate(Off)InCounterfunction,theisinresponsetotransitionatitsexternalpin,T2.InthistheissampledduringofeveryWhentheshowahighincycleandalowinthethecountisnewappearsinregisterduringofcyclefollowinginthetransitiondetected.machinecycles(24oscillatorperiods)arerequired1-to-0transition,thecountrateisoftheoscillatorfrequency.Toensurethatasampledatonceitchanges,thelevelforfullmachinecycle.6

InterruptsThehasaofsixtwointerrupts(

INT0

INT1

timerinterrupts(Timers0,1,andEachofcanindividuallydisabledsettingclearingabitinSpecialFunctionIE.IEaglobalbit,whichallinterruptsNotethatbitisunimplemented.softwarenota1bitsinceitmayusedinproducts.generatedbythelogicalORofbitsTF2andinregisterT2CON.ofisclearedbyisvectoredto.InthemayhavetodeterminewhetheritwasEXF2thatgeneratedthethatbitwillbeclearedinsoftware.Timer0flags,areatoftheinwhichoverflow.arethenbycircuitryinthetheTimer2flag,TF2,issetatispolledinthesamecycleinwhichtimeroverflows.areinputrespectively,ofaninvertingthatcanforuseanoscillator.aquartzcrystalorceramicresonatormayTodrivethefromanexternalshouldbeleftwhiledriven,.arenorequirementsthecycleoftheexternalclockinputinternalclock-ingcircuitryisthroughadivide-by-twoflip-flop,minimumvoltagehighlowspecificationsmustbeInthePower-downmode,oscillatorstopped,thatinvokesPower-downexecuted.on-chipSpecialFunctionRegistersuntilPower-downisterminated.ExitfromPower-downcanbebyaresetoranenabledexternalinterrupt.Resetredefinesdoesnotchangetheon-chipshouldnotbeactivatedbeforeVCCisrestoredoperatingbe7

longtoallowtostabilize.IdleModInmode,theCPUputsitselfsleepwhilealltheon-chipperipheralsremainTheisinvokedbyThecontentofon-chipandallthespecialregis-tersremainunchangedduringmode.Thecanbebyanyenabledinterruptorahardwarereset.Notethatidlebyreset,normallypro-gramexecutionfromwhereitlefttotwomachinecyclesbeforetakescontrol.toRAMinevent,butaccessthepinsnotinhibited.Toeliminatepossibilityoftoaportpinidlemodeisbyfollowingthatmodeshouldnottoportorto8

AT89S52單片應(yīng)用功能特征描述是一種低功耗能位微控制8K在系統(tǒng)可編存儲器。使用Atmel公司高密度非易失性存儲器技術(shù)制造，與工業(yè)80C51產(chǎn)品指令和引腳完全兼容。片上Flash允許程序存儲器在系統(tǒng)可編程，亦適于常規(guī)編程器。在單芯片上，擁有靈巧的8位和在系統(tǒng)可編程，使得為眾多嵌入式控制應(yīng)用系統(tǒng)提供高靈活、超有效的解決方案具有以下標(biāo)準(zhǔn)功能：8k字節(jié)，字節(jié)，32位I/O口線，看門狗定時器，2個數(shù)據(jù)指針，三個16位定時器/計數(shù)器，一個向量2級中斷結(jié)構(gòu)，全雙工串行，片內(nèi)晶振及時鐘電路。另外，可降至靜態(tài)邏輯操作，支持2軟件可選擇節(jié)電模式?？臻e模式下，CPU停止工作，允許RAM、定時器/計數(shù)器、串口、中斷繼續(xù)工作。掉電保護方式下，內(nèi)容被保存，振蕩器被凍結(jié)，單片機一切工作停止，直到下一個中斷或硬件復(fù)位為止。引腳描述：源。GND:接地?？冢篜0口是一個位漏極開路的雙向口。作為輸出口，每位能驅(qū)動8邏輯電平。對P0口寫“1時，引腳用作高阻抗輸入。當(dāng)訪問外部程序和數(shù)據(jù)存儲器時，口也被作為低8位地址數(shù)據(jù)復(fù)用。在這種模式下，具有內(nèi)部上拉電阻。在flash編程時，P0口也用來接收指令字節(jié)；在程序校驗時，輸出指令字節(jié)。程序校驗時，需要外部上拉電阻?？冢嚎谑且粋€具有內(nèi)部上拉電阻的8位雙向I/O口，p1輸出緩沖器能驅(qū)動4個邏輯電平。對端口寫“1”時，內(nèi)部上拉電阻把端口拉高，此時可以作為輸入口使用。作為輸入使用時，被外部拉低的引腳由于內(nèi)部電阻的原因，將輸出電流（IIL。此外，P1.0和分別作定時器/計器2的外部計數(shù)輸入（）和時器/計數(shù)器的觸發(fā)輸入（），具體如下1示。在flash編程和校驗時，P1接收低8地址字節(jié)?？冢篜2口是一個具有內(nèi)部上拉電阻的8位雙向I/O口，輸出緩沖器能驅(qū)動4個邏輯電平。對端口寫“1”時，內(nèi)部上拉電阻把端口拉高，此時可以9

ILILILIL作為輸入口使用。作為輸入使用時，被外部拉低的引腳由于內(nèi)部電阻的原因，將輸出I外部程序存儲器或用16地址讀取外部數(shù)據(jù)存儲例如執(zhí)行MOVX）時，P2口送出高八位地址。在這種應(yīng)用中，P2口使用很強的內(nèi)部上拉發(fā)送1。在用8地址（如@RI）訪問外部數(shù)據(jù)存儲器時，P2口輸出P2存器的內(nèi)容。在編程和校驗時，P2口也接收高8地址字節(jié)和一些控制信號。表口第二功能引腳號引腳號

第二功（定時器/計數(shù)器T2的外部計數(shù)輸入），時鐘輸出（定時器/計數(shù)器T2的捕捉/重載觸發(fā)信號和方向控制）MOSI（在系統(tǒng)編程用）MISO（在系統(tǒng)編程用）在系統(tǒng)編程用）表2P3口第二能第二功RXD（串行輸入）TXD（串行輸出）(外部中斷(外部中斷1)（定時器0外部輸入）定時器1部輸入）

WR

外部數(shù)據(jù)存儲器寫選通)外部數(shù)據(jù)存儲器寫選通)口P3口是一個有內(nèi)部上拉電阻的位雙向I/O口，p2輸出緩沖器能驅(qū)動4個邏輯電平。對端口寫“”時，內(nèi)部上拉電阻把端口拉高，此時可以作為輸入口使用。作為輸入使用時，被外部拉低的引腳由于內(nèi)部電阻的原因，將輸出電流（I）?？谝嘧鳛樘厥夤δ埽ǖ诙δ埽┦褂茫?表所示。在flash10

編程和校驗時，也接收一些控制信號。RST復(fù)位輸入工作時持續(xù)2個機器周期高電平將使單片機復(fù)位?？撮T狗計時完成后，RST腳輸出96個晶振周期的高電平。特殊寄存器地址8EH)的位可以使此功能無效。DISRTO認(rèn)狀態(tài)下，復(fù)位高電平有效。ALE/地址鎖存控制信（是訪問外部程序存儲器時鎖存低位地址的輸出脈沖。在flash程時，此引腳

)也用作編程輸入脈沖。在一般情況下，ALE以晶振六分之一的固定頻率輸出脈沖，可用來作為外部定時器或時鐘使用。然而，特別強調(diào)，在每次訪問外部數(shù)據(jù)存儲器時ALE沖將會跳過。如果需要，通過將地址為8EHSFR的第0位“1ALE操作將無效這一位“ALE僅在執(zhí)行MOVX或MOVC指令時有效否則ALE將被微弱拉高這個ALE使能標(biāo)志位（地址為8EHSFR的第0位）的設(shè)置對微控制處于外部執(zhí)行模式下無效。：外部程序存儲器選通信號(

PSEN)外部程序存儲器選通信號。當(dāng)從外部程序存儲器執(zhí)行外部代碼時在每個機器周期被激活兩次，而在訪問外部數(shù)據(jù)存儲器時，將不被激活。EA/VPP：訪問外部程序存儲器控制信號。為使能從0000H到FFFFH的外部程序存儲器讀取指令EA必須接。為了執(zhí)行內(nèi)部程序指令EA應(yīng)該接在編程期間EA也接收12VPP電壓。：蕩器反相放大器和內(nèi)部時鐘發(fā)生電路的輸入端。：蕩器反相放大器的輸出端。程序存儲器如EA引腳接地序讀取只從外部存儲器開始EA接VCC，程序讀寫先從內(nèi)部存儲器（地址為～）開始，接著從外部尋址，尋址地址為：。數(shù)據(jù)存儲器有字節(jié)片內(nèi)數(shù)據(jù)存儲器。高128字節(jié)與特殊功能寄存器重疊。也就是說高128節(jié)與特殊功能寄存器有相同的地址，而物理上是分開的。當(dāng)一條指令訪問高于7FH的地址時方式?jīng)Q定CPU訪問高字節(jié)RAM還是特殊功能寄存器空間。直接尋址方式訪問特殊功能寄存器SFR。例如，下面的直接尋址指令訪問0A0H（存儲單元MOV,#data使用間接尋址方式訪問高字節(jié)11

RAM。例如，下面的間接尋址方式中，內(nèi)容為，訪問的是地址0A0H的寄存器，而不是（它的地址也是0A0H）。。棧操作也是簡介尋址方式。因此，高128節(jié)數(shù)據(jù)RAM也可用于堆?？臻g?？撮T狗定時器WDT是一種需要軟件控制的復(fù)位方式。由位計數(shù)器和特殊功能寄存器中的看門狗定時器復(fù)位存儲器WDTRST）構(gòu)成。WDT在默認(rèn)情況下無法工作；為了激WDT必須WDTRST寄存址0A6H次寫01EH。當(dāng)WDT激活后，晶振工作，WDT在每個機器周期都會增加。WDT計時周期依賴于外部時鐘頻率除了復(fù)（硬件復(fù)位或溢出復(fù)位沒有辦法停止WDT工作。當(dāng)WDT溢出，它將驅(qū)動RSR腳一個高個電平輸出。在掉電模式下，晶振停止工作，這意味這WDT也停止了工作。在這種方式下，用戶不必喂狗兩種方式可以離開掉電模式復(fù)位或通過一個激活的外部中斷。通過硬件復(fù)位退出掉電模式后，用戶就應(yīng)該給WDT喂狗，就如同通常復(fù)位一樣過中斷退出掉電模式的情形有很大的不同應(yīng)持續(xù)拉低很長一段時間，使得晶振穩(wěn)定。當(dāng)中斷拉高后，執(zhí)行中斷服務(wù)程序。為了防止WDT在中斷保持低電平的時候復(fù)位器件，WDT直到中斷拉低后才開始工作。這就意味著WDT應(yīng)該在中斷服務(wù)程序中復(fù)位。為了確保在離開掉電模式最初的幾個狀態(tài)WDT不被溢出，最好在進(jìn)入掉電模式前就復(fù)WDT在進(jìn)入待機模式前特殊寄存器的WDIDLE位用來決定WDT是否繼續(xù)計數(shù)。默認(rèn)狀態(tài)下，在待機模式下，WDIDLE＝0，WDT繼續(xù)計數(shù)。為了防止在待機模式下復(fù)位，用戶應(yīng)該建立一個定時器，定時離開待機模式，喂狗，再重新進(jìn)入待機模式。定時器0和定時器在中，定時器和定時器1的操作與AT89C51和AT89C52一樣。為了獲得更深入的關(guān)于UART的信息，可參考ATMEL網(wǎng)站。從這個主頁，選擇“Products8051-Architech”即可。定時器2定時器是一個16位定時/計數(shù)器，它既