1、業(yè)設計（論文） （外文翻譯） 中英文資料外文翻譯文獻中英文資料外文翻譯文獻 Design of Digital Controlled Signal Generator Based on DDS and MCUDesign of Digital Controlled Signal Generator Based on DDS and MCU KeywordsKeywords: DDS; MCU; Signal generator; Phase Accumulator; DAC AbstractAbstract. Its advantage to use DDS chip is output si

2、gnal frequency bigger, and precision higher, Butusers cant change the output signal waveforms. The MCU can produce the required arbitrary waveforms, but its program execution of the order limit the speed.So we use their Synergy to designthe digital controlled signal generator. The System has the adv

3、antage of output good qualitywaveform, frequency of precision and stability ,and high frequency, empty, amplitude and phase is tostep into the need. IntroductionIntroduction The digitally synthesized sine waveform (Direct Digital Synthesis, DDS) is a well-known method andhas been applied to many emb

4、edded applications 1. This technique can be used to create a positivedigital sine waveform. Compared to other frequency composing method, Direct Digital FrequencySynthesis(DDS) has been the most popular trend in modern frequency synthetic technique for itsexcellent characteristics. The signal source

5、 that the DDS technology realizes can carry out accuratecontrolling on DDS frequency , extent , phase exporting wave forms etc. by numerical control circuit,the system making use of this method has many merits such as stability, reliably and accuracy. The commercial DDS chip can only export a sine w

6、ave for the data in the ROM form already hasbeen solidified. If needing to come into being any wave form, it may come true by the way that FPGAadopts DDS IP core or hardware describe language etc, however,the cost of This way cost is high; onthe other hand, any wave form can be achieved by making us

7、e of micro controller unit (MCU) to carryout figure frequency combining and DA converting. The experiment and applying testing have shownthat the numerical control signal source composed of STM32 micro controller and DDS chip canwork well. 業(yè)設計（論文） （外文翻譯） DDS and wave form programming pattern The cor

8、e of DDS system is phase accumulator carriage, and it is composed of a ADR and one unitphase register. When any clock comes, the phase register increases by with the step length, phaseregister output and phase control word add together, and then the output is imported to sine inquiryform address. Th

9、e sine inquiring form includes the numeral extent information of one-period sine wave, each address corresponds to the phase dot of 0360 degrees of the sine wave. The mapping digital signaldrives DAC and outputs analog value. The output sine circle and frequency are The phase register will return to

10、 the original state when the 2N/M fc clock is finished. Accordingly,the DDS system output a sine wave when the sine inquiring form finish a circle. The output sine circleand frequency is TO -output sine wave circle, unit: s; TC -external referenced clock circle, unit: s;M -accumulated step length of

11、 phase register, constant; f out -output sine wave frequency, unit: Hz; f c -external referenced clock frequency, unit: Hz; N -phase accumulator digit, constant. The relationship among the frequency control word, and the output signal frequency and the referenced clock frequency are: Frequency contr

12、ol word is directly proportional to the output signal frequency. In order to describeclearly, the sine wave form is as one vector turns around phase circle, the phase circle matches alongwith a cycle sine wave. Every sampling pots in wave form corresponds to a phase dot of the phasecircle. To synthe

13、sis the required frequency signal, it needs to accomplish the following steps 1. Controlling every sampling increment of phase and accumulating them (frequency control word K),output 2 pi cumulated phase (using phase accumulator). 2. Converting 2 pi accumulating phase into the corresponding sine amp

14、litude, use ROM to store thecorresponding phase-extent form of sine function in general. 3. Use DAC to change extent code into the signal simulating voltage. 4. The voltage signal that DAC exports is ladder wave form , the required simulation voltage out 業(yè)設計（論文） （外文翻譯） isachieved after LPF smoothing

15、. Numerical control DDS signal source system designs analysisNumerical control DDS signal source system designs analysis System uses the STM32 as control core and the AD9850 as generator. STM32 is 32-bit ARM-basedmicro controller with 128 K byte flash memory. The two signal output of STM32 can be ac

16、hieved by controlling AD9850 and DAC0832 outputsimultaneously. The system designs block diagram is shown in Fig. 1. One signal output can generate30 MHz sine wave and rectangular wave by controlling AD9850, the other output generate any waveform with its frequency less than 10 KHz by numerical frequ

17、ency mixture of DAC0832. Fig. 1 System designs block diagram Hardware designHardware design AD9850 module AD9850 contains the DDS system and high-speed comparator. The AD9850 can realize the entirenumerical frequency combining. The core of the programmable DDS is the phase accumulator, it iscomposed

18、 of a ADR and a N bit phase register, N is for 24 32. After connecting to the accurate clock source and writing the frequency phase control word, AD9850 can generate the frequency-programmable and phase-programmable output of analog sinewave, which can be used as the direct frequency signal source o

19、r be transferred into rectangular wavethrough high-speed comparator. With the 125 MHz clock, 32-bit frequency control word can carry out the output frequency resolution ratio of AD9850 with 0.0291 Hz4. DAC0832 module The circuit exports the phase data sheet to DAC0832 from STM32 and gets correspondi

20、ng waveform by DA converting. The step-by-step adjusting phase amounts can create arbitrary frequency, thePWM signal from the STM32 transfers into the corresponding voltage by low-pass filter, therefore,the referenced voltage of DAC0832 is controlled, furthermore, the output wave 業(yè)設計（論文） （外文翻譯） form

21、 extent is tunedappropriately. The digital to analog conversion circuit is shown in Fig.2 Fig. 2 DAC circuit PWM converting DA circuit The low-pass filtered PWM signal from STM32 is then stable using the voltage follower, whichwill yield a stable output voltage; the voltage can be adjusted by tuning

22、 the PWM dutyfactor. Thesystem output three PWM signals, which controls AD9850 output extent, dutyfactor and the outputextent of DAC0832, respectively,. Fig. 3 shows the PWM controls DA transferring circuit. Fig. 3 PWM controlled DA converting circuit 業(yè)設計（論文） （外文翻譯） Fig. 4 Export amplification and t

23、he wave filtering circuit. (a) amplification circuit; (b) filtering circuit Amplification and wave filtering circuit The amplification circuit will export amplified wave form and modify the factor of amplification. Anexcellent smooth output waveform can be achieved by using the low-pass active power

24、 filtering. Theamplification circuit and the filtering circuit is showed in Fig. 4. Software designSoftware design And the system software mainly include AD9850 driving module, DAC0832 driving module, thestep-by-step automation module, PWM-converting-DA module and uC/GUI figure supporting system imp

25、lanted in procedure. The operation interface is full of humanization for the multi-windowpattern is adopted. The design process of the system software is shown in Fig. 5. Implanted uC/GUI The numerical control signal source has used the uC/GUI software sufficiently to establish manywindows and contr

26、ol buttons. By means of invoking the corresponding windows and control with thefeedback information, the peripheral equipment operated under the control of the system. The external equipment is mainly separated into two drivers, the drive being an AD9850 moduleand DAC0832 module drive, respectively.

27、 The two modules can be controlled by means of the outsideinterruption and timing interruption. AD9850 Drive AD9850 has 40 control words, among them, 32-bit is used for frequency control, 5-bit is used for the phase control, 1-bit is used for the power source dormancy control, 2-bit is used to choos

28、eoperation pattern. 業(yè)設計（論文） （外文翻譯） Fig. 5 Systematic procedure flow chart This 40 control words may arrive at AD9850 by concurrence way or serial way, in the concurrenceway, 8 data highway generals can transfer the data to a register. After repeating 5 times, the 40-bit data is loaded into the frequ

29、ency / phase data register (forrefreshing DDS output frequency and phase) at the FQ-UD rising edge, meanwhile, the addresspointer is reset to the first input register Then the 8-bit data is loaded at the W-CLK rising edge, and the pointer is set to the next inputregister. After repeating 5 times of

30、W-CLK rising edge, the W-CLK rising edge will work no longeruntil the reset signal comes or the address pointer is reset to the first input register by the FQ-UDrising edge. The procedure operate AD9850 module through the bottom function, as void ad9850( double frequency, /frequency unsigned char ph

31、ase, /phase unsigned char mode, /pattern unsigned char power /source ) The DAC0832 driven module 業(yè)設計（論文） （外文翻譯） In the design of the numerical control signal source, DAC0832 is defined as single buffered pattern, when the 8 bit Parallel data D0D7 is input, the DA will transfer data in the CS. The bo

32、ttom function of void DA0832(u8 value)can invoke Out_To_DDS0832(double Frequency,u8 type) function and control the defined wave form and frequency. This function is based on figure frequency composes principle, it transfers the input frequency intocorresponding control word, and then combing phase s

33、tep-by-step expect, output wave form datasheet in memory. The extent and dutyfactor can be tuned through invoking Adjust_Vpp() and Adjust Duty() Step-by-step automation procedure A step-by-step automation procedure brick is added to the design to define the frequency range,step-by-step rate , step-b

34、y-step amounts , ascending or lapse, cycling pattern. The step-by-step automation function can be realized through invoking Auto Step(AutoStepStr*AS) and passing memory structure type to a function. Test the experiment and data analysis The DDS numerical control signal source can import the various

35、changeable control words by atouching screen, and then accurately control the signal frequency, dutyfactor, extent and phase. Figure6 shows the corresponding experimental wave forms. Fig. 6 The oscillograph exports experiment picture (a) 1 KHz wave form output; (b) 1 MHz wave form output; (c) 20 MHz

36、 wave form output. With the oscillograph testing, it shows that the circuit work stably and rightly. The variousparametric index exhibit fine numerical control effect. a. Output frequency range: 1Hz30MHz，peak-to-peak value: 50mV10V；dutyfactor: 10%100%, difference1%。 b. Export the sine wave, sawtooth

37、 wave rectangular wave, triangle wave and arbitrarily wave form. c. Continuous Step-by-step adjustment of frequency, dutyfactor, extent and phase. d. The operation of the touching screen includes suppositional keyboard, sliding strip andvarious suppositional control carry out entering operation, and

38、 the every parameters can 業(yè)設計（論文） （外文翻譯） bedemonstrated visually. e. Step-by-step automation, definition of: maximum value , minimum value , step-by-step rate ,step-by-step amounts , ascending or lapse, cycling or not. Numerical control reform advantage of signal sourceNumerical control reform advan

39、tage of signal source The designed numerical control signal source is applied to the lathe reform experiment. The maintargets of the numerical control system are the coordinate axis displacement (including displacementspeed , direction , location etc.) , the control message originates from numerical

40、 control treating ormoving control procedure mainly. Therefore, systematic the most fundamental composition of the numerical control system shouldinclude three parts: The input/output procedure device, numerical control equipment and the servodrives. ConclusionsConclusions Making compound use of DDS

41、 and MCU controller, the system can exported the numerical controlsignal source as the consumer need, it has the merits such as good exporting wave form, frequencyaccuracy, reliable stability and high dutyfactor. Each parameter and be easily adjusted by touching ascreen, the experiments show that th

42、e various parametric indexes have fine numerical control effect. ReferencesReferences 1 Lygouras J. N., Tarchanidis K. N.,Tsalides Ph. G., “Suspended Sediment and Dye ConcentrationMeasurements Using a Digital Techniques”, Int. J. Electronics, 87, No.1, pp 107, (2000). 2 Webster J. G. Ed., “Tactile S

43、ensors for Robotics and Medicine”, Wiley, New York, (1988). 3 Dally J. W., Rilley W. F., Mcconnel K.G., “Instrumentation for Engineering Measurements”,Wiley, New York, (1993). 4 Tarchanidis K. N., Ioannidis I. N., Kakkalis I. K. And Lygouras J. N., “FLEXIMAT, an Integrated System Scanning the Bendin

44、g of Any Matress.”, Int. Workshop on Virtual and Intelligent Measurement Systems, VIMS 2000, Annapolis, MD, USA, 29-30 April 2000, pp 115, (2000). 5 Koukourlis C. S., Voulgaris N. C., “A Digital Method for Sinewave Generation.” Archiv fur Electrotechnik, 72, pp 327, (1989). 6 Koukourlis Chr. S, Trig

45、onidis V. K., Sahalos J. N., “Differential Synchronous Demodulation for Small Signal Amplitude Estimation.”, IEEE Instrumentation and Measurement, 42, No. 5, pp 業(yè)設計（論文） （外文翻譯） 926, (1993). 業(yè)設計（論文） （外文翻譯） 基于基于 DDSDDS 和單片機數(shù)字控制信號發(fā)生器的設計和單片機數(shù)字控制信號發(fā)生器的設計 關鍵詞關鍵詞: :DDS; MCU;信號發(fā)生器;相位累加器;DAC 摘要摘要: : 它的優(yōu)點，使用 D

46、DS 芯片輸出信號的頻率更大，精度更高，但用戶不能改變輸出信 號的波形。MCU 可以產(chǎn)生所需的任意波形，但其程序執(zhí)行的順序限制速度。因此，我們利用 它們之間的協(xié)同設計數(shù)字控制信號發(fā)生器。 該系統(tǒng)的優(yōu)點是輸出質(zhì)量好的精度和穩(wěn)定性， 波 形，頻率和高頻率的，空的振幅和相位是步入需要。 介紹介紹 數(shù)字合成的正弦波形（直接數(shù)字頻率合成器DDS）是一種公知的方法已被應用到許多嵌 入式應用1。 這種技術可以用來創(chuàng)建一個積極的數(shù)字正弦波形。 其它頻率合成方法相比, 直 接數(shù)字頻率合成器（DDS）一直以其優(yōu)良的特性在現(xiàn)代頻率合成技術中最流行的趨勢。DDS 技術實現(xiàn)信號源，可以進行精確控制DDS 的頻率，程度，

47、相輸出波形的數(shù)值控制電路等,系 統(tǒng)利用這種方法有許多優(yōu)點，如安定，可靠和準確度。 商業(yè) DDS 芯片只能導出一個正弦波因為ROM 表中的數(shù)據(jù)形式已經(jīng)被凝固。 如果需要進入 任何波形， 它可能會真正的由FPGA采用DDS的IP核或硬件描述語言等方式來實現(xiàn)， 然而, 這 種方式成本費用高;另一方面，可以任意波形通過開展數(shù)字頻率結合使用的微控制器單元 （MCU）和DA 轉換實現(xiàn)。實驗和應用測試表明，數(shù)控信號源所組成的STM32 微控制器和 DDS 芯片可以很好地工作。 DDSDDS 和波形編程模式和波形編程模式 DDS 系統(tǒng)的核心是相位累加器的框架，它是由一個ADR 和一單位相位寄存器組成的。當 任

48、何時鐘到來時，相位寄存器增加步長， 相寄存器的輸出與相位控制字相加， 然后輸出導入 到正弦查詢形成地址。 正弦查詢表格包含一個周期正弦波，每個數(shù)字幅度信息地址對應于0360 度的正弦波 的相位點。測繪數(shù)字信號驅動DAC 并模擬輸出值。輸出正弦波周期和頻率是: 業(yè)設計（論文） （外文翻譯） 相位寄存器將返回到原來的狀態(tài)時，2N/ M fc 時鐘完成。因此，DDS 系統(tǒng)輸出一個正弦 波的正弦查詢表時，完成一個周期。輸出正弦波的周期和頻率為TO - 輸出正弦波周期，單 位：秒; TC - 外部參考時鐘周期，單位：秒; M - 相位寄存器累計步長，恒定f 輸出 - 輸 出正弦波頻率，單位：赫茲; fc

49、 - 外部參考時鐘頻率，單位為赫茲; N - 相位累加器的位 數(shù)，不變。頻率控制字和輸出信號的頻率與參考時鐘頻率之間的關系是： 頻率控制字與輸出信號的頻率成正比。 為了描述清楚， 正弦波的形式是一個向量轉換的 相位周期， 相位周期與正弦波的一個周期相匹配。 在波形里的每個采樣點對應一個相位點的 相位周期。 合成所需的頻率信號，它需要完成以下步驟： 1.控制每個采樣相位增量和積累（頻率控制字K） ，輸出 2 pi 累計相位（使用相位累加 器） 。 2.轉換成相應的正弦振幅2 pi 積累階段，使用 ROM 來存儲相應的相位幅度的一般正弦 函數(shù)形式。 3.采用 DAC 代碼轉換成模擬信號電壓變化幅度

50、。 4.電壓信號，DAC 出口是階梯波的形式，實現(xiàn)所需的模擬電壓輸出低通濾波器平滑后的 電壓。 數(shù)控數(shù)控 DDSDDS 信號源系統(tǒng)設計分析信號源系統(tǒng)設計分析 系統(tǒng)使用 STM32 作為控制核心和 AD9850 作為發(fā)生器。 STM32 是基于 ARM 的 32 位微控制 器與 128 K 字節(jié)的閃存。 STM32 的兩個信號輸出，可以實現(xiàn)同時通過控制AD9850 的和 DAC0832 輸出。該系統(tǒng)的 設計的框圖如圖 1 所示。一個信號輸出通過控制 AD9850，可產(chǎn)生 30 MHz 正弦波和矩形波， 其他輸出的任意波形及其頻率低于10 千赫是通過頻率數(shù)值混合器DAC0832 產(chǎn)生的。 業(yè)設計（

51、論文） （外文翻譯） 圖圖 1 1 系統(tǒng)設計框圖系統(tǒng)設計框圖 硬件設計硬件設計 AD9850 的模塊 AD9850 包含 DDS 系統(tǒng)和高速比較器。 AD9850 可以實現(xiàn)對整個數(shù)字頻率相結合。 可編程 的 DDS 的核心是相位累加器，它是由ADR 和一個 N 位相位寄存器組成，N 為 2432。 連接到精確的時鐘源和寫入頻率相位控制字后，AD9850 的可以產(chǎn)生可編程頻率和相位 可編程的模擬正弦波輸出波， 這可以用來作為直接的高頻信號源， 或者通過高速比較器被轉 移到矩形波。 通過 125 MHz 時鐘，32 位頻率控制字可以把 AD9850 的輸出頻率分辨率展開到0.0291 赫茲4。 D

52、AC0832 模塊 電路是通過 DA 從 STM32 向 DAC0832 輸出相位數(shù)據(jù)表并得到相應的波形。一步一步的調(diào) 節(jié)相量， 可以創(chuàng)建任意的頻率， PWM 信號通過低通濾波器從STM32 傳輸?shù)较鄳碾妷海?因此， DAC0832 的參考電壓是被控制的，而且，輸出的波形幅度調(diào)節(jié)適當。數(shù)字到模擬轉換電路， 如圖 2 所示: 業(yè)設計（論文） （外文翻譯） 圖圖 2 DAC2 DAC 電路電路 PWM 轉換 DA 電路 低通濾波器的 PWM 信號從 STM32 到穩(wěn)定使用電壓跟隨器， 然后穩(wěn)定將產(chǎn)生一個穩(wěn)定的輸 出電壓， 通過調(diào)整 PWM 占空比可調(diào)節(jié)電壓。 該系統(tǒng)輸出的 3 個 PWM 信號，

53、 它分別控制 AD9850 的輸出范圍，占空比和輸出DAC0832 的范圍。圖 3 顯示出的 PWM 控制 DA 傳輸電路。 放大和濾波電路 放大電路將輸出放大波形和修改放大的因素。 一個很好的平滑的輸出波形， 可以通過使 用低通有源功率濾波實現(xiàn)。放大電路和濾波電路在圖4 中顯示。 圖圖 3 PWM3 PWM 控制控制 DADA 轉換電路轉換電路 業(yè)設計（論文） （外文翻譯） 圖圖 4 4 導出放大和濾波電路導出放大和濾波電路: :（a a）放大電路（）放大電路（b b）濾波電路）濾波電路 軟件設計軟件設計 系統(tǒng)軟件主要包括 AD9850 的驅動模塊，DAC0832 驅動模塊，一步一步的自動化

54、模塊， PWM 轉換 DA 模塊和 uC/ GUI 圖片支持的系統(tǒng)中植入程序。由于采用多窗口的圖案使得操作 界面充滿人性化。系統(tǒng)軟件的設計過程如圖5 所示。 圖圖 5 5 系統(tǒng)程序流程圖系統(tǒng)程序流程圖 植入的 uC/ GUI 業(yè)設計（論文） （外文翻譯） 數(shù)控信號源已足夠多的使用的uC / GUI 軟件建立許多窗口和控制按鈕。通過調(diào)用相應 的窗口和控制反饋信息，外圍設備在系統(tǒng)的控制下操作。 外部設備主要分為兩個驅動器， 驅動器 AD9850 的模塊和 DAC0832 模塊驅動。 這兩個模 塊可以通過外側中斷和定時中斷被控制。 AD9850 的驅動器 AD9850 具有 40 個控制字，其中，

55、32 位用于頻率控制，5 位用于的相位控制，1 位用于 電源休眠控制，2 位用于選擇運作模式。 這 40 個控制字可在允許的方式或串行方式到達AD9850，在允許的方式下，8 位數(shù)據(jù)一 般可高速將數(shù)據(jù)傳送到寄存器。 重復 5 次后，在 40 位的數(shù)據(jù)被加載到頻率/相位數(shù)據(jù)寄存器（用于刷新的DDS 輸出頻 率和相位） ，同時，上面的 FQ-UD 上升沿地址指針復位到第一個輸入寄存器。 然后 8 位數(shù)據(jù)被加載在 W-CLK 上升沿，將指針設置到下一個輸入注冊。 W-CLK 上升沿重 復 5 次后， 在 W-CLK 上升沿將不再工作， 直到復位信號或地址指針復位到第一個輸入寄存器 的 FQ-UD 上

56、升沿。 程序操作 AD9850 模塊通過底部的功能，作為： void ad9850( double frequency, /frequency unsigned char phase, /phase unsigned char mode, /pattern unsigned char power /source ) DAC0832 驅動模塊 在設計中的數(shù)字控制信號源， DAC0832 被定義為單緩沖的模式， 當 8 位并行數(shù)據(jù) D0D7 被輸入，DA 將在 CS 中傳輸數(shù)據(jù)。 空的 DA0832（U8 值）的底層函數(shù)可以調(diào)用Out_To_DDS0832（雙頻率，U8 型）的功能和 控制定義的波形和頻率。 此功能是基于數(shù)字頻率合成原則， 它把輸入頻率傳送到相應的控制字， 然后一步一步結 合相位預計，在記憶體中輸出波形數(shù)據(jù)表。 通過的調(diào)用 Adjust_Vpp（）的程度和占空因數(shù)可調(diào)諧和調(diào)整印花稅（） 一