1、電子設(shè)計專題ADC831單片機原理,2.1 ADC831特殊功能寄存器介紹(續(xù)) 2.2 ADC831 SPI/I2C接口 2.3 串行8位7段數(shù)碼管顯示驅(qū)動器MAX7219 2.4 ADC831與MAX7219的接口及顯示程序,2、ADC831系統(tǒng)資源介紹2,2.1、ADC831特殊功能寄存器介紹（續(xù)）,a、 Interrupt Enable Register（IE） Address：0A8H,b、 Interrupt Priority Register（IP） Address：0B8H,c、 Secondary Interrupt Enable Register（IEIP2） Addres

2、s：0A9H,Interrupt Priority,PTIPriority for Time Interval Interrupt PPSMPriority for Power Supply Monitor Interrupt PSIPriority for SPI/I2C InterruptETITime Interval Counter Interrupt Enable Bit EPSMIPower Supply Monitor Interrupt Enable Bit ESISPI/I2C Serial Port Interrupt Enable Bit,The Interrupt En

3、able registers are written by the user to enable individual interrupt sources, while the Interrupt Priority registers allow the user to select one of two priority levels for each interrupt.An interrupt of a high priority may interrupt the service routine of a low priority interrupt, and if two inter

4、rupts of different priority occur at the same time, the higher level interrupt will be serviced first. An interrupt cannot be interrupted by another interrupt of the same priority level. If two interrupts of the same priority level occur simultaneously, a polling sequence is observed as shown in Tab

5、le XXXI.,Interrupt Vectors,org0 ljmpmain org23h ljmpserial_int org60h Main: ;user main routine loop ljmpmain Serial_int:pushpsw pushacc setbrs0;use register ; bank1 jbri,serial_rx jnbti,serial_ret Serial_tx:clrri movr0,tx_temp movsbuf,r0 incr0 movtx_temp,r0 sjmpserial_ret Serial_rx:clrri movr0,rx_te

6、mp movr0,sbuf incr0 movrx_temp,r0 Serial_ret:popacc poppsw reti,d、Power Supply Monitor Control Register(PSMCON),SFR Address: 0DFH,CMPDDVDD Comparator Bit. This is a read-only bit and directly reflects the state of the DVDD comparator. PSMIPower Supply Monitor Interrupt Bit. This bit will be set high

7、 by the MicroConverter if either CMPA or CMPD is low, indicating low analog or digital supply. The PSMI bit can be used to interrupt the processor. Once CMPD and/or CMPA return (and remain) high, a 250 ms counter is started. When this counter times out, the PSMI interrupt is cleared. PSMENPower Supp

8、ly Monitor Enable Bit. TPD1、TPD0DVDD Trip Point Selection Bits.,e、Watchdog Timer Control Register（WDCON）,The purpose of the watchdog timer is to generate a device reset or interrupt within a reasonable amount of time if the ADuC831 enters an erroneous state, possibly due to a programming error or el

9、ectrical noise.,SFR Address：0C0H,PRE3、PRE2、PRE1、PRE0Watchdog Timer Prescale Bits. The Watchdog timeout period is given by the equation: tWD = (2PRE (29/fR/C OSC). (0 PRE 7; fR/C OSC = 32 kHz 10% at 25C),WDIRWatchdog Interrupt Response Enable Bit. If this bit is set by the user, the watchdog will gen

10、erate an interrupt response instead of a system reset when the watchdog timeout period has expired. This interrupt is not disabled by the CLR EA instruction and it is also a fixed, high-priority interrupt. If the watchdog is not being used to monitor the system, it can alternatively be used as a tim

11、er. The prescaler is used to set the timeout period in which an interrupt will be generated. WDSWatchdog Status Bit. Set by the Watchdog Controller to indicate that a watchdog timeout has occurred. Cleared by writing a “0” or by an external hardware reset. It is not cleared by a watchdog reset. WDEW

12、atchdog Enable Bit. Set by the user to enable the watchdog and clear its counters. If this bit is not set by the user within the watch dog timeout period, the watchdog will generate a reset or interrupt, depending on WDIR. Cleared under the following conditions, user writes “0,” Watchdog Reset (WDIR

13、 = “0”);Hardware Reset; PSM Interrupt. WDWRWatchdog Write Enable Bit. To write data into the WDCON SFR involves a double instruction sequence. The WDWR bit must be set and the very next instruction must be a write instruction to the WDCON SFR.,$MOD831 ; Use 8052 enable INT0 (button on eval board) SE

14、TB EA,; Configure the Watchdog timer. It should be configured like this, ; with the global interrupts turned off and setting WDWR to allow ; writing to WDCON. CLR EA SETB WDWR MOV WDCON, #72h ; Enable Watchdog timer to cause ; -2.0 second timeout period ; -enable WDIR bit to generate ; a reset and n

15、ot an interrupt SETB EA ; set global interrupts again ; from this point forward, watchdog bits must be refreshed every ; 2.0 seconds or less. if they are not, watchdog timer will ; generate a reset. CLR ERROR ; simulate error free operation ; The below loop represents normal code execution. FLASH: M

16、OV A, R0 CALL DELAY ; delay by 100ms x R0 CPL LED ; blink (complement) the red LED CLR EA ; refresh watchdog timer SETB WDWR SETB WDE SETB EA,JNB ERROR, FLASH ; jump if ERROR flag is not set ; The below endless loop represents run-away code execution. SETB LED ; turn LED off during runaway code JMP

17、$ ; this endless loop is used to ; represent an unknown state of ; program execution ; program will sit in the above endless loop until the watchdog ; period (2000ms) has elapsed, at which time a reset will be ; generated by the watchdog timer, thereby recovering the chip to ; resume normal code exe

18、cution. DELAY: ; delay 100ms MOVR2,A; Acc holds delay variable DLY0: MOV R7,#200 ; 200 * 500us = 100ms DLY1: MOV R6,#229 ; 229 * 2.17us = 500us DJNZ R6,$ ; sit here for 500us DJNZ R7,DLY1 ; repeat 200 times (100ms delay) DJNZR2,DLY0; Dec R2 100ms DELAY END,2.2 ADC831 SPI/I2C接口,ADC831片內(nèi)集成通用同步串行外圍器件接口

19、SPI (Serial Peripheral Interface) 和集成電路互聯(lián)接口 I2C (Inter Integrated Circuit) 。,SPI接口是一種在同步串行時鐘(SCLOCK)的控制下，一次傳輸操作可以同時發(fā)送和接收8位數(shù)據(jù)的同步串行接口即全雙工同步串行接口。 SPI接口是主從工作方式接口，分為主機(Master)工作方式和從機(Slave)工作方式。在數(shù)據(jù)傳輸時，由主機工作方式的SPI口產(chǎn)生串行時鐘脈沖(SCLOCK)，在SCLOCK時鐘脈沖的作用下，主機SPI口將數(shù)據(jù)發(fā)送到從機SPI口，同時從機SPI口將數(shù)據(jù)傳送給主機SPI口。 ADC831的SPI接口即可以工作在

20、主機方式，也可以配置為從機方式。,注意：由于ADC831 SPI方式的MOSI引腳和I2C方式SDATA引腳共用，并且兩種方式共用SCLOCK引腳，因此在實際應(yīng)用系統(tǒng)中，只能使用SPI或I2C一種接口方式。,2.2.1 ADC831 SPI接口相關(guān)的引腳,P3.3/INT1*/MISO/PWM0引腳19 在SPI接口方式該引腳為MISO(Master Input Slave Output)是串行數(shù)據(jù)的輸入/輸出引腳。在主機工作方式時為串行數(shù)據(jù)輸入引腳，在從機工作方式時為串行數(shù)據(jù)輸出引腳。 SDATA/MOSI引腳27在SPI接口方式該引腳為MOSI (Master Output Slave I

21、nput )也是串行數(shù)據(jù)的輸入/輸出引腳。在從機工作方式時為串行數(shù)據(jù)輸入引腳，在主機工作方式時為串行數(shù)據(jù)輸出引腳。 SCLOCK引腳26在SPI接口方式是同步串行時鐘輸入/輸出引腳。在主機方式為時鐘輸出腳，在從機方式為時鐘輸入腳。 P1.5/ADC5/SS*引腳12在SPI接口方式是SS*(Slave Select)從機工作方式選擇輸入引腳。,6.2.2 ADC831 SPI接口的SFR,一、SPI控制寄存器,ISPI- SPI接口中斷標志位。 WCOL-寫沖突標志。 SPE- SPI接口允許位。 SPIM- SPI接口主機方式選擇位。 CPOL- 時鐘極性選擇位。CPOL=1，SCLOCK高

22、電平空 閑； CPOL=0，低電平空閑。 CPHA-時鐘相位選擇位。CPHA=1，SCLOCK時鐘前沿傳輸數(shù)據(jù)；CPHA=0，后沿傳輸數(shù)據(jù)。 SPR1、SPR0-在主機方式選擇數(shù)據(jù)傳輸位速率。fosc/2、 fosc/4、 fosc/8、 fosc/16。 在從機方式SPR0反映SS*輸入引腳的狀態(tài)。,圖6.1 ADC831 SPI接口時序圖,SPI數(shù)據(jù)寄存器即是SPI接口的發(fā)送數(shù)據(jù)寄存器，也是接收數(shù)據(jù)寄存器。 在主機工作方式，CPU將數(shù)據(jù)寫入SPIDAT寄存器，則啟動一次SPI接口的數(shù)據(jù)傳輸過程。SCLOCK輸出8個時鐘脈沖，SPIDAT寄存器的8位數(shù)據(jù)在主機MOSI按從高位到低位的順序串行

23、輸出，同時主機采集MISO的串行輸入數(shù)據(jù)，并將采集到的8位數(shù)據(jù)保存在SPIDAT寄存器中。數(shù)據(jù)傳輸結(jié)束，SPICON寄存器中ISPI中斷標志置“1”，表示一次SPI數(shù)據(jù)傳輸完成。如果中斷允許，將產(chǎn)生一次SPI接口中斷。CPU讀SPIDAT寄存器將自動清除ISPI標志位。 在從機工作方式，SCLOCK是時鐘輸入引腳。SPIDAT寄存器的數(shù)據(jù)從MISO引腳串行輸出，SPI主機發(fā)送的數(shù)據(jù)從MOSI引腳輸入。在CPHA=1時，8個時鐘脈沖結(jié)束，傳輸過程完成；CPHA=0時，SS*輸入引腳由低變高標志傳輸過程完成。,二、SPI數(shù)據(jù)寄存器,SPI多從機方式互聯(lián)模型,SPI MASTER,SPI SLAVE

24、1,SPI SLAVE2,SPI SLAVE3,MOSI,MISO,SCLOCK,CS1,CS2,CS3,SS1,SS2,SS3,2.2 串行8位7段數(shù)碼管顯示驅(qū)動器MAX7219,2.2.1 7段LED數(shù)碼管顯示電路的基本結(jié)構(gòu),一、靜態(tài)顯示方式,二、動態(tài)顯示,三、MAX7219功能簡介,MAX7219是一款單片7段LED顯示驅(qū)動器。它可以支持8位7段LED數(shù)碼管顯示，片內(nèi)集成了8X8顯示RAM存儲器、BCD碼/七段代碼轉(zhuǎn)換器、數(shù)碼管驅(qū)動等電路，無需CPU干預完成數(shù)碼管的動態(tài)掃描、顯示任務(wù)。大大減輕了CPU數(shù)碼管顯示掃描任務(wù)的負擔。 顯示驅(qū)動電路采用恒流方式驅(qū)動數(shù)碼管，無需外接限流電阻，使外部

25、元件達到最少。 MAX7219采用SPI兼容的接口方式，與單片機或微處理器接口非常簡單、便捷。,1. MAX7219典型應(yīng)用電路,2. MAX7219功能框圖,3.MAX7219接口時序,4. MAX7219內(nèi)部寄存器說明,MAX7219有14個8位寄存器，地址為0H0FH。 空操作(No Op)寄存器(Addr= 0H)顧名思義對MAX7219工作狀態(tài)無影響，主要用于多個MAX7219級聯(lián)使用。 顯示寄存器(Addr=1H8H)8字節(jié)的顯示單元。每個存儲單元的D0D7對應(yīng)一位7段LED數(shù)碼管的段碼SEGASEGG、SEGDP。地址1H單元對應(yīng)數(shù)碼管DIG0、地址2H單元對應(yīng)數(shù)碼管DIG1、地

26、址8H單元對應(yīng)數(shù)碼管DIG7。,譯碼方式(Decode Mode)寄存器(Addr=9H)譯碼方式寄存器確定是否采用BCD碼/七段顯示代碼譯碼方式。,BCD碼/七段顯示代碼譯碼方式顯示對照表,亮度控制寄存器(Addr=0AH)MAX7219驅(qū)動的LED數(shù)碼管段電流最大值由連接在V+和ISET引腳的外接電阻值確定。實際LED數(shù)碼管段電流可以設(shè)置亮度控制寄存器用數(shù)字方式進行16級段電流調(diào)節(jié)，以達到亮度控制的目的。,掃描限制(Scan Limit)寄存器(Addr=0BH)用于設(shè)置MAX7219掃描LED數(shù)碼管的個數(shù)，最大數(shù)碼管個數(shù)為8。,關(guān)顯示方式寄存器(Addr=0CH)在關(guān)顯示狀態(tài)，MAX72

27、19 顯示掃描振蕩器停振，段驅(qū)動SEGASEGG、SEGDP輸出低電平，位驅(qū)動DIG0DIG7輸出高電平。,顯示測試寄存器(Addr=0FH)用于測試七段LED數(shù)碼管。在測試方式，8個數(shù)碼管都處于“亮”的狀態(tài)。,2.4 ADC831與MAX7219的接口及顯示程序,利用ADC831 SPI接口完成MAX7219初始化，并在數(shù)碼管DIG0DIG8顯示18數(shù)字。,$MOD831 LOADEQUP3.4;定義P3.4為MAX7219 LOAD SPIMODEQU33H;SPI方式字，允許SPI接口主機方式，fosc/16， ；SCLOCK空閑為低電平，前沿傳輸數(shù)據(jù)。 STACK_TOPEQU0EFH

28、 CSEG ORG0H RESET:JMPMAIN ORG60H MAIN:MOVSP,#STACK_TOP CLREA;關(guān)中斷 MOVSPICON,#SPIMOD;設(shè)置SPI接口方式 CALLMAX7219_INIT; MOVR7,#8 MOVR5,#1 WRI_1TO8:MOVR2,05；寄存器0組R5-R2 MOVR3,05；寄存器0組R5-R3 CALLWRI_7219 INCR5 DJNZR7,WRI_1TO8 JMP$,;* ;ROUTINE NAME:MAX7219_INIT ;FUNCTION:MAX7219 Intialization ;INPUT:NONE ;OUTPUT:NONE ;CALL:WRI_7219 ;USED REGESTER:PSW,A,DPTR,R6