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1、Review,Characteristics of Memory System Types of Memory The Memory Hierarchy Cache Memory Virtual Memory,Main Content,Micro-Operations Control of the Processor Hardwired Implementation Microprogrammed Control,Control Unit,The control unit (CU) is that portion of the processor that actually causes th
2、ings to happen The control unit issues control signals external to the processor to cause data exchange with memory and I/O modules The control unit issues control signals internal to the processor to move data between registers, to cause the ALU to perform a specified function, and to regulate othe
3、r internal operations,Micro-Operations,Programs are executed as a sequence of instructions Each instruction consists of a series of steps that make up the instruction cycle - fetch, decode, etc. Each of these steps are, in turn, made up of a smaller series of steps called micro-operations micro-oper
4、ations are the functional, or atomic, operations of a processor,Micro-Operations,Constituent Elements of Program Execution,Operation analysis,There are 4 processor cycle for the complementation of a instruction,The Fetch cycle,The Indirect cycle,The Execute cycle,The Interrupt cycle,Only fetch and e
5、xecute cycles always occurring,The things needed to specify the function of a processor,Operations (opcode) Addressing modes Registers I/O module interface Memory module interface Interrupt processing structure,Fetch - 4 Registers,Memory Address Register (MAR) Connected to address bus Specifies addr
6、ess for read or write op Memory Buffer Register (MBR) Connected to data bus Holds data to write or last data read Program Counter (PC) Holds address of next instruction to be fetched Instruction Register (IR) Holds last instruction fetched,Fetch Sequence,Address of next instruction is in PC Address
7、(MAR) is placed on address bus Control unit issues READ command Result (data from memory) appears on data bus Data from data bus copied into MBR PC incremented by 1 (in parallel with data fetch from memory) Data (instruction) moved from MBR to IR MBR is now free for further data fetches,Fetch cycle
8、micro-operations,Memory MBR,Rules for Clock Cycle Grouping,Proper sequence must be followed MAR - (PC) must precede MBR - (memory) Conflicts must be avoided Must not read leave off all control lines indicated by a 0 bit. If the condition indicated by the condition bits is false, execute the next mic
9、roinstruction in sequence. If the condition indicated by the condition bits is true, the next microinstruction to be executed is indicated in the address field.,Micro-program Word Length,Based on 3 factors Maximum number of simultaneous micro-operations supported The way control information is repre
10、sented or encoded The way in which the next micro-instruction address is specified,Design Considerations,Size of microinstructions Address generation time Determined by instruction register Once per cycle, after instruction is fetched Next sequential address Common in most designed Branches Both con
11、ditional and unconditional,Advantages and Disadvantages of Microprogramming,Simplifies design of control unit Cheaper Less error-prone Slower,Example (The address of next microinstruction can be obtained in the address field directly.),Review Questions (思考題),CHAPTER 0,1. Provide a typical list of the inputs and outputs of a control unit.
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